University of Southern California

Export 63 results:
2008
Anderson, E., D. - I. Kang, and M. C. French, "System on a Programmable Chip Adapation Through Active Partial Reconfiguration", The International Conference on Engineering of Reconfigurable Systems and Algorithms, Leeds, United Kingdom, July, 2008.
French, M. C., E. Anderson, and D. - I. Kang, "Autonomous System on a Chip Adaptation through Partial Runtime Reconfiguration", Field-Programmable Custom Computing Machines, 2008. FCCM '08. 16th International Symposium on, pp. 77 -86, april, 2008.
French, M. C., E. Anderson, and D. - I. Kang, "Autonomous System on a Chip Adaptation through Partial Runtime Reconfiguration", Field-Programmable Custom Computing Machines, 2008. FCCM '08. 16th International Symposium on, pp. 77 -86, april, 2008.
2006
Singh, K., A. Agbaria, D. - I. Kang, and M. C. French, "An Evaluation of Software Fault Tolerance Techniques on a Tiled Architecture", 9th Annual International Conference on Military and Aerospace Programmable Logic Devices, September, 2006.
Singh, K., A. Agbaria, D. - I. Kang, and M. C. French, "An Evaluation of Software Fault Tolerance Techniques on a Tiled Architecture", 9th Annual International Conference on Military and Aerospace Programmable Logic Devices, September, 2006.
French, M. C., L. Wang, M. Wirthlin, and P. Graham, "Reducing Power Consumption of Radiation Mitigated Designs for FPGAs", 9th Annual International Conference on Military and Aerospace Programmable Logic Devices, September, 2006.
French, M. C., L. Wang, M. Wirthlin, and P. Graham, "Reducing Power Consumption of Radiation Mitigated Designs for FPGAs", 9th Annual International Conference on Military and Aerospace Programmable Logic Devices, September, 2006.
Singh, K., A. Agbaria, D. - I. Kang, and M. C. French, "Tolerating SEU Faults in the Raw Architecture", 3rd International Workshop on Dependable Embedded Systems, Leeds, United Kingdom, October, 2006.
Singh, K., A. Agbaria, D. - I. Kang, and M. C. French, "Tolerating SEU Faults in the Raw Architecture", 3rd International Workshop on Dependable Embedded Systems, Leeds, United Kingdom, October, 2006.
French, M. C., P. Graham, M. Wirthlin, G. Larchev, and L. Wang, "Cross Functional Design Tools for Radiation Mitigation and Power Optimization of FPGA Circuits", NASA Earth Science Technology Conference, College Park, MD, June, 2006.
French, M. C., P. Graham, M. Wirthlin, G. Larchev, and L. Wang, "Cross Functional Design Tools for Radiation Mitigation and Power Optimization of FPGA Circuits", NASA Earth Science Technology Conference, College Park, MD, June, 2006.
Wang, L., M. C. French, A. Davoodi, and D. Agarwal, "FPGA dynamic power minimization through placement and routing constraints", EURASIP J. Embedded Syst., vol. 2006, New York, NY, United States, Hindawi Publishing Corp., pp. 7–7, January, 2006.
Wang, L., M. C. French, A. Davoodi, and D. Agarwal, "FPGA dynamic power minimization through placement and routing constraints", EURASIP J. Embedded Syst., vol. 2006, New York, NY, United States, Hindawi Publishing Corp., pp. 7–7, January, 2006.
French, M. C., L. Wang, and M. Wirthlin, "Power Visualization, Analysis, and Optimization Tools for FPGAs", Proceedings of the 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, Washington, DC, USA, IEEE Computer Society, pp. 185–194, 2006.
French, M. C., L. Wang, and M. Wirthlin, "Power Visualization, Analysis, and Optimization Tools for FPGAs", Proceedings of the 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, Washington, DC, USA, IEEE Computer Society, pp. 185–194, 2006.
2005
French, M. C., L. Wang, and M. Wirthlin, "Integrated Tool Suite for Post Synthesis FPGA Power Consumption Analysis", 8th Annual International Conference on Military and Aerospace Programmable Logic Devices, September, 2005.
French, M. C., L. Wang, and M. Wirthlin, "Integrated Tool Suite for Post Synthesis FPGA Power Consumption Analysis", 8th Annual International Conference on Military and Aerospace Programmable Logic Devices, September, 2005.
French, M. C., P. Graham, M. Wirthlin, G. Larchev, and L. Wang, "Radiation Mitigation and Power Optimization Design Tools for Reconfigurable Hardware in Orbit", NASA Earth Science Technology Conference, College Park, MD, June, 2005.
French, M. C., P. Graham, M. Wirthlin, G. Larchev, and L. Wang, "Radiation Mitigation and Power Optimization Design Tools for Reconfigurable Hardware in Orbit", NASA Earth Science Technology Conference, College Park, MD, June, 2005.
Crago, S., M. C. French, J. Suh, and C. Chen, "Multiprocessor Performance for Polymorphous Computing Systems", Goverment Microcircuit Applications and Critical Technology Conference, Las Vegas, NV, April, 2005.
Crago, S., M. C. French, J. Suh, and C. Chen, "Multiprocessor Performance for Polymorphous Computing Systems", Goverment Microcircuit Applications and Critical Technology Conference, Las Vegas, NV, April, 2005.
French, M. C., L. Wang, T. Anderson, and M. Wirthlin, "Post Synthesis Level Power Modeling of FPGAs", Proceedings of the 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, Washington, DC, USA, IEEE Computer Society, pp. 281–282, 2005.
French, M. C., L. Wang, T. Anderson, and M. Wirthlin, "Post Synthesis Level Power Modeling of FPGAs", Proceedings of the 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, Washington, DC, USA, IEEE Computer Society, pp. 281–282, 2005.
2004
French, M. C., "A Power Efficient Image Convolution Engine for Field Programmable Gate Arrays", 7th Annual International Conference on Military and Aerospace Programmable Logic Devices, September, 2004.
French, M. C., "A Power Efficient Image Convolution Engine for Field Programmable Gate Arrays", 7th Annual International Conference on Military and Aerospace Programmable Logic Devices, September, 2004.