Venkata Pingali


Broad Areas


My research interests have evolved over time but by and large focused on system design. To quickly summarize:

Undergraduate work: Network File Systems
Industry Work: High speed networks, Network Management
Masters Work: Architectural issues and high performance applications
Ph.D Work (So far): Mobile computing (briefly), Virtual Internet design and deployment, Network Configuration
Long term: Intersection of economics and technology - questions related to change, complexity, control and abstraction of large networked systems, generalized sensor networks, Internet for resource poor/low energy environments

Thesis Work In Progress

Addressing Uncertainty during Renaming using Space-time Contexts

Protocol names such as IP address change over time, and such changes result in disruption of communication. This disruption is acceptable in most circumstances, but not all. In case of latter, additional approaches are required to deal with the fundamental problem associated with the disruption - uncertainty of scope, nature and timing of the impact. This paper suggests an architectural mechanism, called space-time contexts, to deal with this uncertainty. Space-time contexts allow conflicting distributions of names to co-exist, which enables an alternative model of change. The paper also describes the design issues associated with contexts and our current implementation.

Pingali, V., Touch, J. Addressing Uncertainty during Renaming using Space-time Contexts, Under submission, Feb 2008 [PDF]


Dynamic Network Renaming using Space-Time Contexts

This work suggests extending namespaces in protocols such as IP in layered networks with a context of interpretation. These contexts allow conflicting distributions of names within a namespace to overlap in space and time. By altering what is discovered, i.e., context in addition to name, and decoupling the discovery process from the rest of the communication, space-time contexts reduce disruption during renaming in layered networks. The expressiveness of the layered network in terms of control is also simultaneously enhanced enabling a variety of advanced network management capabilities to be built.

Pingali, V., Touch, J. Dynamic Network Renaming using Space-Time Contexts, Poster at IEEE INFOCOM, Anchorage, AK, May, 2007 . Abstract: [PDF] Poster: [PPT] [PDF]


DANSE: Dynamic Network Synthesis (2005)

DANSE is a system and architecture to deploy virtual networks in a decentralized fashion using network- specific and reusable deployment strategies. DANSE leverages VI architecture and recent developments in host support for network virtualization to provide for a framework for programmatic decentralized construction of networks in a network-independent way. This deployment mechanism along with virtual internet capabilities provide us with the unique ability to create diverse networks with fine grained control over when and how the networks are managed. The applications are mainly in the network management domain including automated network (re)configuration without flag days and self-organization.

Pingali, V., Touch, J., Wang., Y., Decentralized Virtual Internet Deployment using DANSE. ISI Technical Report 641, May 2007 (Original manuscript - Dec 2005). [PDF]


X-Tend (2003-)

Global X-Bone

Abstract:

A global Internet overlay testbed is being deployed to support the distributed, shared use of resources for network research. The Global X-Bone (GX-Bone) augments the X-Bone software system, enhancing its coordination mechanisms to support deployment of local overlays to world-wide, shared infrastructure. The GX-Bone is based on the X-Bone's Virtual Internet Architecture which extends the Internet for both concurrent, parallel and recursive overlays, and provides decentralized, automated deployment and management. GX-Bone supports host virtualization through the NetFS file system, granting individual users compartmentalized access and control of host and router configuration, and the DataRouter extension to IP loose source routing that supports application control of network-layer forwarding. GX-Bone can be installed on user-modified kernels, uniquely supporting both conventional kernel-level protocol development and coordinated global infrastructure sharing.

Touch, J., Wang, Y., Pingali V., Eggert, L., Zhou R., Finn G. G. , A Global X-Bone for Network Experiments. Invited paper. Tridentcom. Feb 2005. [PDF]
Touch, J., Wang, Y., Pingali V., Eggert, L., Zhou R., Finn G. G. , A Global X-Bone for Network Experiments. INFOCOM Poster and Demo, Mar 2005.[PDF] [Summary:pdf]

P2P-XBone: Peer-to-peer Extentions to X-Bone

Abstract:

An architecture to deploy virtual IP networks with P2P-like dynamic topology management is described. Existing virtual IP network deployment mechanisms do not allow for dynamic topology adaptation and fault-tolerance since provisioning of IP tunnels is performed only once when a virtual network is deployed. We propose a P2P-XBone, in which a P2P protocol such as DHT drives the topology and the routing table of a virtual IP network consistent with its neighbor node state. We describe how to extend both the existing X-Bone system and P2P protocols to achieve interworking between them. The P2P-XBone not only provides P2P's characteristics such as self-organization, fault-tolerance and content-based routing to virtual IP networks but also provides higher forwarding performance and simpler implementation to P2P systems due to the availability of existing network services. We also show several evaluation results on the overhead of P2P-driven provisioning and on forwarding performance.

Fujita, N., Touch, J., Pingali V., Wang., Y., P2P-XBone: A Virtual Network Support for Peer-to-Peer Systems. Technical Report ISI-TR-2005-607, USC/ISI, September 2005. [PDF]
Fujita, N., Touch, J., Pingali V., Wang., Y., A Dynamic Topology and Routing Management Strategy for Virtual IP Networks, IEICE Transactions on Communications, Vol. E89-B, No. 9, pp. 2375-2384, September 2006. [PDF]

Other Project Work


Recursive Network Architecture(Fall 2006)

Abstract:

The Recursive Network Architecture (RNA) explores the relationship of layering to protocol and network architecture. RNA examines the implications of using a single, tunable protocol, called metaprotocol, for different layers of the protocol stack, reusing basic protocol operations across different protocol layers to avoid reimplementation. Its primary goal is to encourage cleaner cross-layer interaction and to support dynamic service composition, and to gain an understanding of how layering affects architecture. This paper provides a description of RNA and the prototype under construction. The prototype extends modules within the Click modular router implementation with control capabilities including dynamic composition and discovery. These capabilities are used to demonstrate simple but flexible stacks of instances of the metaprotocol that are customizable at runtime.

Touch, J. and Pingali, V., "The RNA Metaprotocol," Under submission, Feb 2008. [PDF]

Abstract:

The Recursive Network Architecture (RNA) explores the relationship of layering to protocol and network architecture. RNA examines the implications of using a single, tunable protocol for different layers of the protocol stack, reusing basic protocol operations across different protocol layers to avoid reimplementation. The primary goal of this work is to encourage cleaner cross-layer interaction and to support dynamic service composition, and to gain an understanding of how layering affects architecture.

Touch, J., Wang. Y., and Pingali, V., "A Recursive Network Architecture," ISI Technical Report ISI-TR-2006-626, October 2006. [PDF]

Applied Learning Networks (Summer 2005)

Abstract: Current Internet hosts open new connections that are initialized with a number of default, generally conservative, parameters. Applied Learning Networks (ALN) apply accumulated experience with previous network connections to help tune initial parameters for future network connections. ALN provides a demonstration of nontrivial learning in complex communication protocols such as TCP that result in task-specific performance enhancements.

Bannister, J., Shen, W., Touch, J., Hou. F., and Pingali, V., "Applied Learning Networks," Final Report to DARPA, Dec 2006.

Bannister, J., Shen, W., Touch, J., Hou. F., and Pingali, V., "Applied Learning Networks," ISI Technical Report 637, April 2007. [PDF] [DOC]

My contribution was mainly in putting together the measurement infrastructure and data analysis. More specifically I identified opportunities for optimization, developed a simple model to estimate gain, integrated the learning library, analyzed the performance of the library and generated the final performance results of the integrated system. I co-authored the experimental section of the report.

Drifting Overlays (Spring 2006)

Abstract:

Drifting Overlays are dynamic partial network-layer overlays with traffic "safe house" that enterprises can use to control, at fine granularity, the reachability and predictability of paths taken to important hosts. Drifting Overlays enable enterprises a level of control over their own DDoS defenses and routing choices, rather than leaving them at the mercy of their ISPs.

Pingali, V. and Touch, J., Protecting Public Servers from DDoS Attacks Using Drifting Overlays (Extended Abstract), MonAM, Tuebingen, Germany, September 2006. [PDF]

 

Data Router (2003) webpage

Abstract:

Although the Internet provides a routing architecture, many applications find it convenient to implement its own routing algorithm. For example some database algorithms work best when interconnectivity looks like a hypercube. However, to simulate this routing at application level peers establish single-hop (at application level) connections. Delivering a single packet along a path of length N results in as many as N connections being established. There are issues of both complexity and performance of the application. Data routing combines late binding with packet routing based on attributes other than destination IP address. A simple interface allows the application to create data route entries in the kernel and a simple mechanism in the kernel forwards packets based on these data routes. IP packets carry data route-lookup inputs as an IP option. Data routers are flexible and allow “traversal” across multiple name spaces such as DNS names, file names, geographical names etc.

Preliminary performance results show that packets can be data routed at a high rate (~270Kpps). Final speed will depend on the size of the routing table, complexity of data route entries.

Extensions to the FreeBSD 5.0 stable kernel will be available soon.

Touch, J., Pingali, V, “DataRouter: A Network-Layer Service for Application-Layer Forwarding,” Proc. International Workshop on Active Networks (IWAN), Osaka, Springer-Verlag, December 2003. [DOC]
Pingali, V, Zhou., R., Touch, J., “DataRouter: A Network-Layer Service for Application-Layer Forwarding,” SIGCOMM 2004 Poster [PDF]

Late Binding (Fall 2004)  


Demonstrated late binding in TCP on freebsd. This is independent but complementary functionality to the DataRouter.

Notes and FreeBSD 5.0 Patch (Patch is old but code changes are straight forward enough to reuse. Use "options LATEBINDING" in the kernel config file).

NewArch (2002)

(With NewArch Group, USC/ISI)

Abstract:

This paper describes FARA, a new organization of network architecture concepts. FARA (Forwarding directive, Asso- ciation, and Rendezvous Architecture) de nes an abstract model with considerable generality and flexibility, based upon the decoupling of end-system names from network addresses. The paper explores the implications of FARA and the range of architecture instantiations that may be derived from FARA. As an illustration, the paper outlines a particular derived ar- chitecture, M-FARA, which features support for generalized mobility and multiple realms of network addressing.

[Comment: My contribution was mainly M-FARA design and implementation]

Clark, D., Braden, R., Falk, A., and Pingali, V., "FARA: Reorganizing the Addressing Architecture". ACM SIGCOMM 2003 FDNA Workshop, Karlsruhe, August 2003 [PDF] [slides]

Abstract:

This document describes the design of the FARADS prototype in detail. The objective of the prototype was two fold. The first objective was to give a form to the ideas presented in original FARADS Architecture document by David Clark et al [1], and build a platform for experimentation. The second objective was to verify that we indeed get the flexibility and extensibility that was claimed as a benefit of the design. We made several design decisions while instantiating the various components of the architecture primarily due to feasibility and time constraints. We discuss the design in detail, and identifypotential future work. The appendix discusses the various interfaces, and data structures in more detail.

Venkata K. Pingali, Aaron Falk, Ted Faber, Bob Braden. FARADS Prototype: Design and Implementation. Unpublished manuscript, March 2003. [PDF] 

Masters Thesis: Computation Regrouping (2000-2001)

Processor cycles are cheap whereas memory latency kills performance. Is there a way to optimize memory bound applications if we allow for increase in cycle count? The answer is yes. Moving computation around during execution within an application can create temporal locality that is key to reducing to memory access costs.  

Abstract

Data access costs contribute significantly to the execution time of applications with complex data structures. As the latency of memory accesses becomes high relative to processor cycle times, application performance is increasingly limited by memory performance.  In some situations it may be reasonable to trade increased computation costs for reduced memory costs. The contributions of this paper are three-fold: we provide a detailed analysis of the memory performance of a set of seven, memory-intensive benchmarks; we describe Computation Regrouping, a general, source-level approach to improving the overall performance of these applications by improving temporal locality to reduce cache and TLB miss ratios (and thus memory stall times); and we demonstrate significant performance improvements from applying Computation Regrouping to our suite of seven benchmarks. With Computation Regrouping, we observe an average speedup of 1.97, with individual speedups ranging from 1.26 to 3.03. Most of this improvement comes from eliminating memory stall time.

Venkata K. Pingali. Computation Regrouping: Restructuring Programs for Temporal Data Cache Locality. Masters Thesis. University of Utah, July 2001. [thesis:ps]

Venkata K. Pingali, Sally A. McKee, Wilson C. Hsieh, John B. Carter. Computation Regrouping: Restructuring Programs for Temporal Data Cache Locality. ICS 2002: 252-261. (Best Student Paper Award – Program Committee) [PS]

Venkata K. Pingali, Sally A. McKee, Wilson C. Hsieh, John B. Carter, Restructuring Computations for Temporal Data Cache Locality, International Journal of Parallel Programming, Volume 31, Issue 4, Aug 2003, Pages 305 - 338. [PS]

Impulse (2000-2001)

(With Impulse Group, Utah)

Here we use the scatter-gather functionality on the Impulse Memory Controller to construct cache lines of data on the fly. This is particularly useful when the application has poor access patterns. This is really a cool idea where the processor is tricked into believing that it is getting a normal cache line but in reality it is not. Access to these “special” cache lines trigger a gather operation in the background on the memory controller.

Abstract

The effectiveness of cache-based memory hierarchies depends on the presence of spatial and temporal locality in applications.  Memory accesses of many important applications have predictable behavior but poor locality.  As a result, the performance of these applications suffers from the increasing gap between processor and memory performance. In this paper, we describe a novel mechanism provided bythe Impulse memory controller called Dynamic Cache Line Assembly that can be used by applications to improve memory performance.  This mechanism allows applications to gather on-the-fly data spread through memory into contiguous cache lines, which creates spatial data locality where none exists naturally.  We have used dynamic cache line assembly to optimize a random access loop and an implementation of Fast Fourier Transform (FFTW).  Detailed simulation results show that the use of dynamic cache line assembly improves the performance of these benchmarks by up to a factor of 3.2 and 1.4, respectively.

Lixin Zhang, Venkata K. Pingali, Bharat Chandramouli, John B. Carter: Memory System Support for Dynamic Cache Line Assembly. Intelligent Memory Systems 2000: 56-70