* D Flip Flop Test File
*
*Take the capacitor and transistor information
*from you L-Edit File and paste it into the 
*appropriate area below and then simulate

*REMEMBER  PULSE (low voltage, high voltage, rise delay, fall delay, transition delay, high time, period)

*enables awaves processing
.options post

*Model Statements
.model MOSN NMOS (VTO=0.5, KP=50u)
.model MOSP PMOS (VT0=-0.5, KP=20u) 

*Label Your VDD node here for X
Vdd X 0 5

*Label Your GND node here for Y
Vgnd Y 0 0

*************************************
*Capictor list from L-Edit goes here
*************************************

*D input is node A
Vdff A 0 PULSE(0 5 1p 1p 1p 20n 40n)

*Clock input is node B
Vclock B 0 PULSE (0 5 1p 1p 1p 10n 20n)

***************************************
*Transistor List from L-Edit goes here
***************************************

.tran 1n 200n

.END