USC Links
CECS
EE
EE Class Links
MOSIS
USC
VSOE
Home
Index
|
CMOS process and device fundamentals,
digital circuit element and design basics,
interconnect, timing, and power issues for VLSI.
|
|
|
|
|
|
|
|
|
|
|
Transmission electron micrograph
of 1.2 nm gate oxide
|
|
MOSFET
|
|
|
|
L-Edit Materials
NMOS Layout with L-Edit
L-Edit Extraction file (.ext)
Process definition file (.xst)
L-Edit 11 setup file (.tdb)
L-Edit Student Version (7.12) setup file (.tdb)
EE 327 design rules
MOSIS design rules
L-Edit student version
L-Edit tutorial — Bahar, Brown University EN 160
|
SPICE Materials
PSPICE Student Version Download
PSPICE (OrCAD Capture) Lite 9.2 on CD-ROM -
see instructor or TA
PSPICE - inverter transfer curve - Nash
PowerPoint presentation
Inverter example
NAND gate example
NOR gate example
D flip-flop test file
Final project test file
SPICE Basics - Kovacs, Stanford EE 122
SPICE Brief Overview - Van der Spiegel, U Penn
|
Lab Activities Resources
CD4007 Intersil data sheet
|
|
Other Links
How Chips Are Made,
from the Education Programs at
Intel
Microelectronics 101 at IBM Microelectronics
PN diode fabrication, from
Education Applets in Solid State Materials,
Center for Active Learning of Microelectronics
and Photonics at
SUNY Buffalo
Diode and transistor animations, SUNY Buffalo
Edge-triggered D flip-flop with preset and clear
Flip-flops
MIT EECS OpenCourseWare
Introduction to Physical Electronics
(connexions - Rice)
Principles of Semiconductor Devices
VLSI Curriculum - Intel, University of Michigan
Electromigration and Reliability
Moore's "Law"
—
1965 paper
NIST – Constants, Units, and Uncertainty
|
Iddq - Fault Currents
|
|
|
Textbooks
|
|
|
|
|
|
Title
|
Authors
|
Comment
|
|
|
|
Analysis and Design of Digital Integrated Circuits
|
David A. Hodges, Horace G. Jackson, and Resve A. Saleh
|
*
Errata
*
|
|
|
|
Physical Design of CMOS Integrated Circuits Using L-Edit
(Optional)
|
John P. Uyemura
|
|
|
|
|
Other References
|
|
|
|
|
|
Title
|
Authors
|
|
|
|
|
CMOS Digital Integrated Circuits Analysis and Design, Third Edition
|
Sung-Mo (Steve) Kang and Yusuf Leblebici
|
|
|
|
|
Digital Integrated Circuits, Second Edition
|
Jan M. Rabaey, Anantha P. Chandrakasan, and Borivoje Nikolic
|
|
|
|
|
Principles of CMOS VLSI Design, Second Edition
|
Neil H. E. Weste and Kamran Eshraghian
|
|
|
|
|
Principles of CMOS VLSI Design, Third Edition
|
Neil H. E. Weste and David Harris
|
|
|
| |
|
|
Inside SPICE
|
Ron Kielkowski
|
|
|
|
|
MOSFET Modeling with SPICE
|
Daniel Foty
|
|
|
|
|
Operation and Modeling of the MOS Transistor
|
Yannis P. Tsividis
|
|
|
|
|
SPICE
|
Gordon W. Roberts and Adel S. Sedra
|
|
|
| |
|
|
Analog Integrated Circuit Design
|
David A. Johns and Ken Martin
|
|
|
|
|
CMOS Mixed-Signal Design
|
R. Jacob Baker
|
|
|
| |
|
|
CMOS Circuit Design, Layout, and Simulation
|
R. Jacob Baker, Harry W. Li, and David E. Boyce
|
|
|
|
|
CMOS IC Layout
|
Dan Clein
|
|
|
|
|
Instructor
|
P. Thomas Vernier
|
310.448.8752
|
Tom Vernier@
|
|
|
|
Office Hours
|
Tu Thu 11:00–12:00
|
SSC 312
|
or by appointment
|
|
|
|
|
|
|
|
|
|
|
Teaching Assistant
|
Brent Nash
|
|
Brent Nash@
|
|
|
|
Teaching Assistant
|
Keith Takishita
|
|
Keith Takishita@
|
|
|
|
Office Hours
|
M W F 12:30–13:45
|
OHE picnic tables
|
(or RTH)
|
|
|
|
Academic Integrity
|
|
|
|
Standards for academic integrity published in the SCampus
(USC Student Guidebook, Section 11)
will be strictly enforced. Each student is responsible for familiarity
with USC rules for academic honesty and behavior covered in the University
Student Conduct Code.
|
|
|
