INVERTER gate hspice file

*enables awaves processing
.options post

.model NCHAN NMOS (VTO=0.5, KP=50u)
.model PCHAN PMOS (VT0=-0.5, KP=20u) 

V1 1 0 5
V2 2 0 PULSE(0 3.3 0 0.1n .1n 1n 2n)

M1 3 2 1 1 PCHAN W=10u L=2u
M2 3 2 0 0 NCHAN W=4u L=2u

C1 3 0 20f

.tran 10p 10n
.measure tran avgpwr avg P(v1) from=0 to=2n

.op

.end