Publications

Export 9 results:
2016
2015
2014
G. Neela, and J. Draper, "Modeling the Impact of TSVs on Average Wire Length in 3DICs Using a Tier-Level Hierarchical Approach", VLSI (ISVLSI), 2014 IEEE Computer Society Annual Symposium on: IEEE, pp. 154–159, 2014.
G. Neela, and J. Draper, "A multi-mode energy-efficient double-precision floating-point multiplier", Circuits and Systems (MWSCAS), 2014 IEEE 57th International Midwest Symposium on: IEEE, pp. 29–32, 2014.
G. Neela, and J. Draper, "Optimal techniques for assigning inter-tier signals to 3D-vias with path control in a 3DIC", Circuits and Systems (ISCAS), 2014 IEEE International Symposium on: IEEE, pp. 802–805, 2014.
2013
G. Neela, and J. Draper, "An asymmetric adaptive-precision energy-efficient 3DIC multiplier", Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI: ACM, pp. 269–274, 2013.
G. Neela, and J. Draper, "Techniques for Assigning Inter-Tier Signals to Bondpoints in a Face-to-Face Bonded 3DIC", Proceedings of the IEEE International 3D Systems Integration Conference, 2013.