Publications

Export 26 results:
2016
S. S. Bhargav, A. Kolb, and Y. H. Cho, "Accelerating physical level sub-component power simulation by online power partitioning", Quality {Electronic} {Design} ({ISQED}), 2016 17th {International} {Symposium} on: IEEE, pp. 221–226, 2016.
2014
Y. H. Cho, S. S. Bhargav, and A. Goodney, "Digital signal transition counters for digital integrated circuits", United States Patent and Trademark Office, no. US 14/226,085: Google Patents, 10/2014.
2013
A. Goodney, S. Kumar, A. Ravi, and Y. H. Cho, "Efficient pmu networking with software defined networks", Smart {Grid} {Communications} ({SmartGridComm}), 2013 {IEEE} {International} {Conference} on: IEEE, pp. 378–383, 2013.
2012
A. Goodney, and Y. H. Cho, "Physical layer sensing using long pseudo noise codes", Proceedings of the {Seventh} {ACM} {International} {Conference} on {Underwater} {Networks} and {Systems}: ACM, pp. 5, 2012.
J. Friedman, H. Herman, N. Truong, Y. H. Cho, and M. B. Srivastava, "Realtime in-ocean submerged collision avoidance via biomimetic electrostatic imaging", Proceedings of the {Seventh} {ACM} {International} {Conference} on {Underwater} {Networks} and {Systems}: ACM, pp. 1, 2012.
A. Goodney, and Y. H. Cho, "Water temperature sensing with microtomography", International Journal of Sensor Networks, vol. 12, no. 2, pp. 65–77, 2012.
2011
2010
A. Goodney, Y. H. Cho, J. Heidemann, and J. Wroclawski, "An underwater communication and sensing testbed in Marina del Rey (poster abstract)", Proceedings of the Fifth ACM International Workshop on UnderWater Networks ({WUWNet}), Woods Hole, MA, US, September, 2010.
J. Moscola, R. K. Cytron, and Y. H. Cho, "Hardware-accelerated RNA secondary-structure alignment", ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol. 3, no. 3, pp. 14, 2010.
A. Goodney, S. Narayan, M. Wang, P. Sun, V. Bhandwalkar, and Y. H. Cho, "NetFPGA logic analyzer", 2nd {North} {American} {NetFPGA} developers workshop, 2010.
2009
Y. H. Cho, and W. H. Mangione-Smith, "Programmable hardware for deep packet filtering", United States Patent and Trademark Office, no. US 11/587,292: Google Patents, 04/2009.
2008
T. Schmid, J. Friedman, Z. Charbiwala, Y. H. Cho, and M. B. Srivastava, "Low-power high-accuracy timing systems for efficient duty cycling", Proceedings of the 2008 international symposium on {Low} {Power} {Electronics} & {Design}: ACM, pp. 75–80, 2008.