Monday, March 25, 2013
Prof. Michael J. Flynn
Professor, IEEE Fellow, ACM Fellow
Department of Electrical Engineering
Title: Dataflow accelerators in High Performance Computing
Achieving parallel processor speedup (n times speedup with n processing elements) has been
difficult for a broad class of applications. But in an era of multi-core processing the need
for speedup has never been greater. The problem is not technology but programming models.
One answer to this speedup problem is to create an idealized data flow machine that exactly
corresponds to the application and stream data through the resulting machine. In the dataflow
paradigm an application is considered as a dataflow graph of the executable actions; as soon
as the operands for an action are valid, the action is executed and the result is forwarded
to the next action in the graph. There are no load or store instructions as the operational
node contains the relevant data. The extraordinary density achieved by FPGAs allows emulations
of the application dataflow machine, providing more than an order of magnitude speedup even as
executed as an emulation of the data flow machine.
Presentation slides (PDF) - Here
Michael J Flynn is currently Chairman of the Board and Senior Advisor to Maxeler Technologies
(of Palo Alto and London). Maxeler is a leading company in creating (with hardware, software
and algorithms) application accelerators for high performance computing. He is also Emeritus
Professor of Electrical Engineering at Stanford.
He began his engineering career at IBM as a designer of mainframe computers. He became Professor
of Electrical Engineering at Stanford in 1975 where he set up the Stanford Architecture and
Arithmetic group. Some of his best-known technical work includes the development of the now familiar
stream outline of computer organization (SIMD, etc.) and the first detailed discussion of
techniques for the simultaneous execution of multiple instructions, now called superscalar design.
In the early 1970s Prof. Flynn founded both of the specialist organizations on Computer Architecture:
the IEEE Computer Society's Technical Committee on Computer Architecture and the ACM's SIGARCH.
Prof. Flynn was a recipient of the ACM/IEEE Eckert-Mauchley Award, the IEEE-CS Harry Goode Memorial
Award, the Tesla Medal from the International Tesla Society (Belgrade), and honorary Doctorates from
Trinity College (University of Dublin), Ireland and the University of Belgrade. He is the author of
six books and over 300 technical papers. He is a fellow of both the IEEE and ACM.
Tuesday, March 26, 2013
Senior Director in the Office of the CTO
San Jose, California
Title: All Programmable SoCs in Academia: Opportunities and Challenges in Teaching and Research
Xilinx has created a new class of All Programmable Systems-on-Chip that integrate state-of-the-art 28nm
FPGA technology and world-leading embedding processing in the form of a dual-core, Cortex-A9 processing
systems from ARM. The new family of Zynq-7000 All Programmable SoCs "democratizes" access to SoC technology
making it possible for educators and researchers to conduct teaching and research with leading-edge silicon.
At the same time, Xilinx has introduced a completely new suite of design tools, called the Vivado Design Suite,
which has been engineered from the ground up to enable the full potential of All Programmable SoCs .
Features such as support for design reuse, high-level synthesis and lower power consumption are among the
many innovations delivered by the Vivado Design Suite.
The combination of Zynq SoCs and Vivado Design Suite present an unrivalled opportunity to modernize teaching
and research in Electronic Engineering and Computer Science so that they better reflect the practices and
challenges of the post-PC era. This talk will highlight some of the opportunities presented by the emergence
of All Programmable SoCs in academia. It will also investigate some of the novel research challenges which
can be addressed by the combination of Zynq SoCs and the Vivado Design Suite and present some forward-looking
perspectives on the future of engineering education.
Presentation slides (PDF) - Here
Patrick Lysaght is a Senior Director in the office of the CTO, in Xilinx
San Jose, Ca. He leads a group whose research interests include power
estimation, system-level modeling and performance analysis,
reconfigurable computing (especially dynamically reconfigurable systems)
and emerging design technologies for FPGAs. He also directs the
worldwide operation of the Xilinx University Program (XUP).
Before joining Xilinx, he held positions as a senior lecturer at the
University of Strathclyde (Glasgow) and at the Institute for System
Level Integration (Livingston, Scotland). He started his career in
research and development with Hewlett Packard (Edinburgh) before going
on to hold a number of technical and marketing positions
Patrick has co-authored more than fifty technical papers, co-edited two
books on programmable logic and holds seven US patents. He is actively
involved in the organization of a number of international conferences.
Patrick holds a BSc (Electronic Systems) from the University of
Limerick, Ireland and a MSc degree (Digital Techniques) from Heriot-Watt
University in Edinburgh, Scotland.