{"id":229,"date":"2022-04-15T17:03:49","date_gmt":"2022-04-15T17:03:49","guid":{"rendered":"https:\/\/www.isi.edu\/research-groups-rcg\/?page_id=229"},"modified":"2024-08-12T15:50:10","modified_gmt":"2024-08-12T15:50:10","slug":"publications","status":"publish","type":"page","link":"https:\/\/www.isi.edu\/research-groups-rcg\/publications\/","title":{"rendered":"Publications"},"content":{"rendered":"\n\n\t<a onclick=\"topFunction()\" id=\"toTop\" aria-label=\"Go to top\">\n<\/a>\n    <label for=\"publications\"><strong>View publications from<\/strong><\/label>\n    <select name=\"publications\" id=\"publications\" onchange=\"selectYear()\">\n        <option value=\"2023\">2023<\/option>\n        <option value=\"2022\">2022<\/option>\n        <option value=\"2021\">2021<\/option>\n        <option value=\"2020\">2020<\/option>\n        <option value=\"2019\">2019<\/option>\n        <option value=\"2018\">2018<\/option>\n        <option value=\"2017\">2017<\/option>\n        <option value=\"2016\">2016<\/option>\n        <option value=\"2015\">2015<\/option>\n        <option value=\"2014\">2014<\/option>\n        <option value=\"2013\">2013<\/option>\n        <option value=\"2012\">2012<\/option>\n        <option value=\"2011\">2011<\/option>\n        <option value=\"2010\">2010<\/option>\n        <option value=\"2009\">2009<\/option>\n        <option value=\"2008\">2008<\/option>\n        <option value=\"2007\">2007<\/option>\n        <option value=\"2006\">2006<\/option>\n        <option value=\"2005\">2005<\/option>\n        <option value=\"2004\">2004<\/option>\n        <option value=\"2003\">2003<\/option>\n        <option value=\"1999\">1999<\/option>\n    <\/select>\n            RPU: The Ring Processing Unit\n            <br \/>\n            D. Soni, N. Neda, N. Zhang, B. Reynwar, et al\n            TREBUCHET: Fully Homomorphic Encryption Accelerator for Deep Computation\n            <br \/>\n            D. B. Cousins, Y. Polyakov, A. A. Badawi, M. French, et al\n            Untangling IP Protection via Learning and Structure\n            <br \/>\n            D. Chen, X. Zhou, S. Chowdhury, P. Beerel, P. Nuzzo, and M. French\n            StereoBit on the SpaceCube Mini\n            <br \/>\n            J. Carr, C. Wilson, D. Wu, M. French, M. Paolieri, H. Madani, M. Kelly\n            Bitstream Assurance Checking Engine for Undocumented Functionality\n            <br \/>\n            A. Schmidt, J. Wilford, B. Reynwar, T. Sung, and M. French\n            Bitstream Assurance Checking Engine for Undocumented Functionality (BRACE)\n            <br \/>\n            Andrew G. Schmidt and Justin Wilford and Benedict Reynwar and Ting-Yuan Sung and Matthew French\n            Towards full-stack acceleration for fully homomorphic encryption\n            <br \/>\n            N. Zhang, H. Gamil, P. Brinich, B. Reynwar, et al\n            Canary: An FPGA Assurance Plugin for Vendor EDA Tools\n            <br \/>\n            D. Glick, A. Schmidt, J. Nifong, T. Haroldsen, J. Monson E. M. Ruiz, and M. French\n            Design and Performance Evaluation of Multispectral Sensing Algorithms on CPU, GPU, and FPGA\n            <br \/>\n            V. Menon, S. Siddiqui, S. Rao, A. Schmidt, V. Chirayath, A. Li, and M. French\n            Independent Testing of Untrusted FPGAs for Faulty Interconnnect\n            <br \/>\n            T. Haroldsen, M. French, T. Sung, D. Glick, J. Danner, L. Lerner\n            Fight Club: Maturing Defense in Depth Obfuscation Techniques\n            <br \/>\n            V. Menon, U. Sharma, S. Roshanisefat, S. Shukla, A. Schmidt, M. French, P. Beerel, and P. Nuzzo\n            {Integrated constellation analysis tools to support new observing strategy mission design}\n            <br \/>\n            Christopher D. Ball and I. Josue Tapia-Tamayo and Marco Paolieri and Andrew J. O&#8217;Brien and Matthew French and Joel T. Johnson and Paul Grogan\n            Independent Testing of Untrusted FPGAs for Faulty Interconnnect\n            <br \/>\n            T. Haroldsen and M. French and T. Sung and D. Glick and J. Danner and L. Lerner\n            Canary: An FPGA Assurance Plugin for Vendor EDA Toolst\n            <br \/>\n            D. Glick and A. Schmidt and J. Nifong and T. Haroldsen and J. Monson and E. M. Ruiz and M. French\n            Fight Club: Maturing Defense in Depth Obfuscation Techniques\n            <br \/>\n            Vivek V. Menon and Uddipt Sharma and Shervin Roshanisefat and Sanket S. Shukla and Andrew G. Schmidt and Matthew French and Peter A. Beerel and Pierluigi Nuzzo\n            Design and Performance Evaluation of Multispectral Sensing Algorithms on CPU, GPU, and FPGA\n            <br \/>\n            Vivek V Menon and Saquib A. Siddiqui and Sanil Rao and Andrew G. Schmidt and Matthew French and Ved Chirayath and Alan Li\n            Canary: An FPGA Assurance Plugin for Vendor EDA Tools\n            <br \/>\n            Dallon Glick and Andrew G. Schmidt and Jude Nifong and Travis Haroldsen and Joshua Monson and E. M. Ruiz and Matthew French\n            Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking\n            <br \/>\n            Benjamin Tan and Ramesh Karri and Nimisha Limaye and Abhrajit Sengupta and Ozgur Sinanoglu and Md Moshiur Rahman and Swarup Bhunia and Danielle Duvalsaint and R. D. and Blanton and Amin Rezaei and Yuanqi Shen and Hai Zhou and Leon Li and Alex Orailoglu and Zhaokun Han and Austin Benedetti and Lucian\n            Logic Obfuscation: Modeling Attack Resiliency\n            <br \/>\n            V. Menon, G. Kolhe, J. Fifty, A. Schmidt, J. Monson, M. French, Y. Hu, P. Beerel, P. Nuzzo\n            StereoBit: StereoBit: An innovative SpaceCube Application for Atmospheric Science\n            <br \/>\n            J. Carr, C. Wilson, D. Wu, M. French, M. Kelly\n            Emulating and Verifying Sensing, Computation, and Communication in Distributed Remote Sensing Systems\n            <br \/>\n            M. French, M. Paolieri, V. Menon, A. Schmidt\n            Evaluation of Remote-Sensing Architectures using the Virtual Constellation Engine\n            <br \/>\n            M. Paolieri, V. Menon, A. Schmidt, and M. French\n            Emulating and Verifying Sensing, Computation, and Communication in Distributed Remote Sensing Systems\n            <br \/>\n            Matthew French and Marco Paolieri and Vivek Menon and Andrew G. Schmidt\n            FPGA Virtualization for Deprecated Devices\n            <br \/>\n            Ian Taras and Andrew G. Schmidt\n            Logic Obfuscation: Modeling Attack Resiliency\n            <br \/>\n            Vivek Menon and Kolhe, Gaurav and Joseph Fifty and Andrew G. Schmidt and Monson, Joshua and French, M. and Hu, Yinghua and Beerel, Peter and Nuzzo, Pierluigi\n            Enhanced Independent Functional Testing of Xilinx FPGAs\n            <br \/>\n            T. Haroldsen, M. French, A. Schmidt, and D. Khamar\n            System-Level Framework for Logic Obfuscation with Quantified Metrics for Evaluation\n            <br \/>\n            V. Menon, G. Kohle, A. G. Schmidt, J. Monson, M. French, Y. Hu, and P. Nuzzo\n            Security-driven metrics and models for efficient evaluation of logic encryption schemes\n            <br \/>\n            Yinghua Hu, Vivek V. Menon, Andrew G. Schmidt, Joshua S. Monson, Matthew French, Pierluigi Nuzzo\n            Constellations in the Cloud: Virtualizing Remote Sensing Systems\n            <br \/>\n            A. G. Schmidt, V. Venugopalan, M. Paolieri, and M. French\n            Quantifying Security and Overheads for Obfuscation of Integrated Circuits\n            <br \/>\n            V. Venugopalan, G. Kolhe, A. Schmidt, J. Monson, M. French, Y. Hu, P. A. Beerel, P. Nuzzo\n            Enhanced Independent Functional Testing of Xilinx FPGAs\n            <br \/>\n            T. Haroldsen and M. French and A. Schmidt and D. Khamar\n            Impact of Off-Chip Memories on HLS-Generated Circuits\n            <br \/>\n            Abhi D. Rajagopala and Ron Sass and Andrew G. Schmidt\n            Design Considerations for Mapping FPGA High-Level Synthesis Algorithms to Next-Generation Memory Devices\n            <br \/>\n            Abhi D. Rajagopala and Ron Sass and Andrew G. Schmidt\n            Constellations in the cloud: Virtualizing remote sensing systems\n            <br \/>\n            Andrew G. Schmidt and Venugopalan, Vivek and Marco Paolieri and French, M.\n            System-Level Framework for Logic Obfuscation with Quantified Metrics for Evaluation\n            <br \/>\n            Vivek V. Menon and G. Kolhe and Andrew G. Schmidt and J. {Monson} and French, M. and Hu, Y. and P. A. Beerel and P. Nuzzo\n            Security-driven Metrics and Models for Efficient Evaluation of Logic Encryption Schemes\n            <br \/>\n            Yinghua Hu and Vivek V. Menon and Andrew Schmidt and Joshua Monson and Matthew French and Pierluigi Nuzzo\n            Quantifying Security and Overheads for Obfuscation of Integrated Circuits\n            <br \/>\n            Vivek Venugopalan and G. Kolhe and Andrew G. Schmidt and Joshua Monson and Matthew French and Hu, Y. and P. A. Beerel and P. Nuzzo\n            Enhanced Independent Functional Testing of Xilinx FPGAs\n            <br \/>\n            Travis Haroldsen and Matthew French and Andrew G. Schmidt and D. Khamar\n            Volcan: System Integration of HLS and HMC with FPGAs\n            <br \/>\n            Abhi D. Rajagopala and Ron Sass and Andrew G. Schmidt\n            Improved Metrics for Obfuscated ICs Government Microcircuit Applications and Critical Technology Conference (GOMACTech)\n            <br \/>\n            M. Zhu, M. French, and P. Beerel\n            Hot and Spicy: Improving Productivity with Python and HLS for FPGAs\n            <br \/>\n            S. Skalick and J. Monson and A. Schmidt and M. French\n            SpaceCubeX2: Heterogeneous On-board Processing for Distributed Measurement and Multi-Satellite Missions\n            <br \/>\n            Matthew French and Andrew G. Schmidt and Sam Skalicky and Thomas Flately and Gary Crum and Alexander Geist and Ved Chirayath and Alan Li\n            Independent Functional Testing of Commercial FPGA Devices\n            <br \/>\n            Travis Haroldsen and Matthew French and Andrew G. Schmidt\n            Hot &amp; Spicy: Improving Productivity with Python and HLS for FPGAs\n            <br \/>\n            Sam Skalicky and Monson, Joshua and Andrew G. Schmidt and French, M.\n            Bridging the Gap between Advanced Memory and Heterogeneous Architectures\n            <br \/>\n            Abhilash Devalapura Rajagopala and Ron Sass and Andrew G. Schmidt and Matthew French\n            Radiation hardening by software techniques on FPGAs: Flight experiment evaluation and results\n            <br \/>\n            A. G. Schmidt and M. French and T. Flatley\n            Irrefutable Tamper Logging through FPGA Key Management\n            <br \/>\n            Jonathan Graf, Ali Asgar Sohangpurwala, Matthew French, and Andrew Schmidt\n            SpaceCubeX: A framework for evaluating hybrid multi-core CPU\/FPGA\/DSP architectures\n            <br \/>\n            A. G. Schmidt and G. Weisz and M. French and T. Flatley and C. Y. Villalpando\n            Initial Approaches for Discovery of Undocumented Functionality in FPGAs\n            <br \/>\n            M. French, A. Schmidt, A. Dasu\n            Evaluating Rapid Application Development with Python for Heterogeneous Processor-Based FPGAs\n            <br \/>\n            A. G. Schmidt and G. Weisz and M. French\n            Evaluating Rapid Application Development with Python for Heterogeneous Processor-based FPGAs\n            <br \/>\n            Andrew G. Schmidt and Weisz, Gabriel and French, M.\n            Radiation Hardening by Software Techniques on FPGAs: Flight Experiment Evaluation and Results\n            <br \/>\n            Andrew G. Schmidt and French, M. and Flatley, Thomas\n            Initial Approaches for Discovery of Undocumented Functionality in FPGAs\n            <br \/>\n            Andrew G. Schmidt and Matthew French and Aravind Dasu\n            SpaceCubeX: A Framework for Evaluating Hybrid Multi-Core CPU FPGA DSP Architectures\n            <br \/>\n            Andrew G. Schmidt and Gabriel Weisz and Matthew French and Thomas Flatley and Carlos Y. Villalpando\n            Real-Time Anomaly Detection Framework for Many-Core Router Through Machine-Learning Techniques\n            <br \/>\n            Kulkarni, Amey and Pino, Youngok and French, Matthew and Mohsenin, Tinoosh\n            A unified hardware\/software MPSoC system construction and run-time framework\n            <br \/>\n            S. {Skalicky} and A. G. Schmidt and S. Lopez and M. French\n            Experimental quantum annealing: case study involving the graph isomorphism problem\n            <br \/>\n            Zick KM, Shehab O, French M\n            Non-Intrusive Wireless Links in Commodity Devices\n            <br \/>\n            J. Couch, N. Steiner, A. Schmidt, W. Headley, P. Athanas, R. McGwier, A. Poetter, S. Rowe, M. French\n            A Unified Hardware\/Software MPSoC System Construction and Run-Time Framework\n            <br \/>\n            Sam Skalicky and Andrew G. Schmidt and Sonia Lopez and French, M.\n            A Parallelizing Matlab Compiler Framework and Run time for Heterogeneous Systems\n            <br \/>\n            Sam Skalicky and Sonia Lopez and Marcin Lukowiak and Andrew G. Schmidt\n            Intra-die process variation aware anomaly detection in FPGAs\n            <br \/>\n            Y. {Pino} and V. {Jyothi} and M. {French}\n            High Level Hardware\/Software Embedded System Design with Redsharc\n            <br \/>\n            Sam Skalicky and Andrew G. Schmidt and Matthew French\n            High-precision self-characterization for the LUT burn-in information leakage threat\n            <br \/>\n            K. M. {Zick} and and M. {French}\n            Content-Oriented Mobile Edge Technology System Integration Framework and Field Evaluation\n            <br \/>\n            Z. {Cao} and M. {French} and R. {Krishnan} and J. {Ng} and D. {Talmage} and Q. {Zhang}\n            High Level Hardware\/Software Embedded System Design with Redsharc\n            <br \/>\n            Sam Skalicky and Andrew G. Schmidt and French, M.\n            Open-Source Bitstream Generation\n            <br \/>\n            Ritesh Kumar Soni and Neil Steiner and Matthew French\n            A Practical Characterization of a NASA SpaceCube Application Through Fault Emulation and Laser Testing\n            <br \/>\n            Walters, John Paul and Zick, Kenneth M. and French, Matthew\n            Fast Lossless Image Compression with Radiation Hardening By Hardware\/Software Co-Design on Platform FPGAs\n            <br \/>\n            Andrew G. Schmidt and French, M.\n            An Evaluation of an Integrated On-Chip\/Off-Chip Network for High Performance Reconfigurable Computing\n            <br \/>\n            Andrew G. Schmidt and William V. Kritikos and Shanyuan Gao and Ron Sass\n            HwPMI: An Extensible Performance Monitoring Infrastructure for Improving Hardware Design and Productivity on FPGAs\n            <br \/>\n            Andrew G. Schmidt and Neil Stiner and French, M. and Ron Sass\n            Integrating Fast Lossless Compression Prediction with Radiation Hardening by Software on FPGAs\n            <br \/>\n            Andrew G. Schmidt and John Paul Walters and French, M. and Didier Keymeulen and Nazeeh Aranki and Matthew Klimesh and Aaron Kiely\n            Redsharc: A programming model and on-chip network for multi-core systems on a programmable chip\n            <br \/>\n            William V. Kritikos and Andrew G. Schmidt and Ron Sass and Erik K. Anderson and French, M.\n            Applying radiation hardening by software to fast lossless compression prediction on FPGAs\n            <br \/>\n            Andrew G. Schmidt and John Paul Walters and Kenneth M. Zick and Matthew French and Didier Keymeulen and Nazeeh Aranki and Matthew Klimesh and Aaron Kiely\n            Software fault tolerance methodology and testing for the embedded PowerPC\n            <br \/>\n            Bucciero, M. and Walters, J.P. and French, M.\n            Torc: towards an open-source tool flow\n            <br \/>\n            Steiner, Neil and Wood, Aaron and Shojaei, Hamid and Couch, Jacob and Athanas, Peter and French, Matthew\n            Checkpoint\/Restart and Beyond: Resilient High Performance Computing with FPGAs\n            <br \/>\n            Schmidt, A.G. and Bin Huang and Sass, R. and French, M.\n            The PowerPC 405 Memory Sentinel and Injection System\n            <br \/>\n            Bucciero, M. and Walters, J.P. and Moussalli, R. and Shanyuan Gao and French, M.\n            Radiation Hardening of FPGA-embedded CPUs via Software, Validated with Fault Emulation\n            <br \/>\n            Walters, J.P. and Zick, K.M. and French, M.\n            Autonomous On-board Processing for Sensor Systems: Initial Fault Tolerance and Autonomy Results\n            <br \/>\n            French, Matthew and Walters, John Paul and Bucceiro, Mark\n            Reconfigurable Computing Cluster Project: A Five-Year Perspective of the Project\n            <br \/>\n            Ron Sass and Andrew G. Schmidt and Scott Buscemi\n            Investigation into Scaling I\/O Bound Streaming Applications Productively with an all-FPGA Cluster\n            <br \/>\n            Andrew G. Schmidt and Siddhartha Datta and Ashwin A. Mendon and Ron Sass\n            Checkpoint\/Restart and Beyond: Resilient High Performance Computing with FPGAs\n            <br \/>\n            Andrew G. Schmidt and Bin Huang and Ron Sass and French, M.\n            Improving Design Productivity with a Hardware Performance Monitoring Infrastructure\n            <br \/>\n            Andrew G. Schmidt and Ron Sass\n            A Radix Tree Router for Scalable FPGA Networks\n            <br \/>\n            William V. Kritikos and Yamuna Rajasekhar and Andrew G. Schmidt and Ron Sass\n            Merging Programming Models and On-chip Networks to Meet the Programmable and Performance Needs of Multi-core Systems on a Programmable Chip\n            <br \/>\n            Schmidt, A.G. and Kritikos, W.V. and Sass, R. and Anderson, E.K. and French, M.\n            Radiation Hardening by Software for the Embedded PowerPC, Preliminary Findings\n            <br \/>\n            Walters, John Paul and Bucciero, Mark and French, Matthew\n            Autonomous On-board Processing for Sensor Systems: High Performance Fault Tolerance Techniques\n            <br \/>\n            French, Matthew and Walters, John Paul and Bucceiro, Mark\n            Investigating Resilient High Performance Reconfigurable Computing with Minimally-Invasive System Monitoring\n            <br \/>\n            Bin Huang and Andrew G. Schmidt and Ashwin A. Mendon and Ron Sass\n            Embedded Systems Design with Platform FPGAs: Principles &amp; Practices\n            <br \/>\n            Ron Sass and Andrew G. Schmidt\n            Merging Programming Models and On-Chip Networks to Meet the Programmable and Performance Needs of Multi-Core Systems on a Programmable Chip\n            <br \/>\n            Andrew G. Schmidt and William V. Kritikos and Ron Sass and Erik K. Anderson and French, M.\n            Impact of Reconfigurable Hardware on Accelerating MPI_Reduce\n            <br \/>\n            Shanyuan Gao and Andrew G. Schmidt and Ron Sass\n            Productively Scaling I\/O Bound Streaming Applications with a Cluster of FPGAs\n            <br \/>\n            Andrew G. Schmidt and Siddhartha Datta and Ashwin A. Mendon and Ron Sass\n            Redsharc: An Abstract Stream Programming Model for FPGAs\n            <br \/>\n            William V. Kritikos and Andrew G. Schmidt and Ron Sass and Erik K. Anderson and Michel Sika and Matthew French\n            AIREN: A Novel Integration of On-Chip and Off-Chip FPGA Networks\n            <br \/>\n            Andrew G. Schmidt and William V. Kritikos and Rahul R. Sharma and Ron Sass\n            Hardware Implementation of MPI_Barrier on an FPGA Cluster\n            <br \/>\n            Shanyuan Gao and Andrew G. Schmidt and Ron Sass\n            A Hardware Filesystem Implementation with Multi-Disk Support\n            <br \/>\n            Ashwin Mendon and Andrew G. Schmidt and Ron Sass\n            Initial Implementation of a Hardware File System with Multiple Disk Support\n            <br \/>\n            Ashwin Mendon and Andrew G. Schmidt and Ron Sass\n            System on a Programmable Chip Adapation Through Active Partial Reconfiguration\n            <br \/>\n            Anderson, Erik and Kang, Dong-In and French, Matthew\n            Autonomous System on a Chip Adaptation through Partial Runtime Reconfiguration\n            <br \/>\n            French, M. and Anderson, E. and Dong-In Kang\n            Reconfigurable Computing Cluster Project: Phase I Brief\n            <br \/>\n            Andrew G. Schmidt and William V. Kritikos and Siddhartha Datta and Ron Sass\n            FPGA Session Control (FSC): Providing Remote Access to A Cluster of FPGAs\n            <br \/>\n            Yamuna Rajasekhar and Yashodhan Phatak and Andrew G. Schmidt and William V. Kritikos and Ron Sass\n            Teaching FPGA System Design via a Remote Laboratory Facility\n            <br \/>\n            Yamuna Rajasekhar and William V. Kritikos and Andrew G. Schmidt and Ron Sass\n            Reconfigurable Computing Cluster (RCC) Project: Investigating the Feasibility of FPGA-Based Petascale Computing\n            <br \/>\n            Ron Sass and William V. Kritikos and Andrew G. Schmidt and Srinivas Beeravolu and Parag Beeraka and Kushal Datta and David Andrews and Richard S. Miller and Daniel Stanzione, Jr.\n            Quantifying Effective Memory Bandwidth of Platform FPGAs\n            <br \/>\n            Andrew G. Schmidt and Ron Sass\n            Characterizing Effective Memory Bandwidth of Designs with Concurrent High-Performance Computing Cores\n            <br \/>\n            Andrew G. Schmidt and Ron Sass\n            Reducing Power Consumption of Radiation Mitigated Designs for FPGAs\n            <br \/>\n            French, Matthew and Wang, Li and Wirthlin, Michael and Graham, Paul\n            An Evaluation of Software Fault Tolerance Techniques on a Tiled Architecture\n            <br \/>\n            Singh, Karandepp and Agbaria, Adnan and Kang, Dong-In and French, Matthew\n            Cross Functional Design Tools for Radiation Mitigation and Power Optimization of FPGA Circuits\n            <br \/>\n            French, Matthew and Graham, Paul and Wirthlin, Michael and Larchev, Greg and Wang, Li\n            FPGA dynamic power minimization through placement and routing constraints\n            <br \/>\n            Wang, Li and French, Matthew and Davoodi, Azadeh and Agarwal, Deepak\n            Tolerating SEU Faults in the Raw Architecture\n            <br \/>\n            Singh, Karandepp and Agbaria, Adnan and Kang, Dong-In and French, Matthew\n            Power Visualization, Analysis, and Optimization Tools for FPGAs\n            <br \/>\n            French, Matthew and Wang, Li and Wirthlin, Michael\n            Integrated Tool Suite for Post Synthesis FPGA Power Consumption Analysis\n            <br \/>\n            French, Matthew and Wang, Li and Wirthlin, Michael\n            Radiation Mitigation and Power Optimization Design Tools for Reconfigurable Hardware in Orbit\n            <br \/>\n            French, Matthew and Graham, Paul and Wirthlin, Michael and Larchev, Greg and Wang, Li\n            Post Synthesis Level Power Modeling of FPGAs\n            <br \/>\n            French, Matthew and Wang, Li and Anderson, Tyler and Wirthlin, Michael\n            Multiprocessor Performance for Polymorphous Computing Systems\n            <br \/>\n            Crago, Stephen and French, Matthew and Suh, Jinwoo and Chen, Chen\n            A Power Efficient Image Convolution Engine for Field Programmable Gate Arrays\n            <br \/>\n            French, Matthew\n            Novel Signal Processing Architectures for Knowledge-based STAP Algorithms)\n            <br \/>\n            French, Matthew and Suh, Jinwoo and Crago, Stephen\n            Design Tools for Reconfigurable Hardware in Orbit (RHinO)\n            <br \/>\n            French, Matthew and Graham, Paul and Wirthlin, Michael and Larchev, Greg and Bellows, Peter\n            Applications of adaptive computing systems for signal processing challenges\n            <br \/>\n            Schott, Brian and Bellows, Peter and French, Matthew and Parker, Robert\n            A performance analysis of PIM, stream processing, and tiled processing on memory-intensive signal processing kernels\n            <br \/>\n            Suh, Jinwoo and Kim, Eun-Gyu and Crago, Stephen P. and Srinivasan, Lakshmi and French, Matthew C.\n            A performance analysis of PIM, stream processing, and tiled processing on memory-intensive signal processing kernels\n            <br \/>\n            Suh, Jinwoo and Kim, Eun-Gyu and Crago, Stephen P. and Srinivasan, Lakshmi and French, Matthew C.\n            Architectures for System-Level Applications of Adaptive Computing\n            <br \/>\n            Schott, Brian and Chen, Chen and Crago, Steve and Czarnaski, Joe and French, Matt and Hom, Ivan and Tho, Tam and Valenti, Terri\n\n","protected":false},"excerpt":{"rendered":"<p>View publications from 2023202220212020201920182017201620152014201320122011201020092008200720062005200420031999 RPU: The Ring Processing Unit D. Soni, N. Neda, N. Zhang, B. Reynwar, et al TREBUCHET: Fully Homomorphic Encryption Accelerator for Deep Computation D. B. Cousins, Y. Polyakov, A. A. Badawi, M. French, et al Untangling IP Protection via Learning and Structure D. Chen, X. Zhou, S. Chowdhury, P. Beerel, P.&hellip;<\/p>\n","protected":false},"author":421,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"news_source":"","news_author":"","external_news_link":"","footnotes":""},"class_list":["post-229","page","type-page","status-publish","hentry"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.2 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>Publications - Reconfigurable Computing Group<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.isi.edu\/research-groups-rcg\/publications\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Publications - Reconfigurable Computing Group\" \/>\n<meta property=\"og:description\" content=\"View publications from 2023202220212020201920182017201620152014201320122011201020092008200720062005200420031999 RPU: The Ring Processing Unit D. Soni, N. Neda, N. Zhang, B. Reynwar, et al TREBUCHET: Fully Homomorphic Encryption Accelerator for Deep Computation D. B. Cousins, Y. Polyakov, A. A. Badawi, M. French, et al Untangling IP Protection via Learning and Structure D. Chen, X. Zhou, S. Chowdhury, P. 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