{"id":290,"date":"2022-11-16T21:06:56","date_gmt":"2022-11-16T21:06:56","guid":{"rendered":"https:\/\/www.isi.edu\/research-groups-rcg\/?page_id=290"},"modified":"2024-08-09T16:30:02","modified_gmt":"2024-08-09T16:30:02","slug":"historical-projects","status":"publish","type":"page","link":"https:\/\/www.isi.edu\/research-groups-rcg\/projects\/historical-projects\/","title":{"rendered":"Historical Projects"},"content":{"rendered":"\n\n\t<a onclick=\"topFunction()\" id=\"toTop\" aria-label=\"Go to top\">\n<\/a>\n\t<header>\n<h2>Completed Projects<\/h2>\n<ul>\n<li><a href=\"#bitbandit\">BitBandit<\/a><\/li>\n<li><a href=\"#combat\">COMBAT: Cooperative Multicast and Broadcast at the Tactical Edge<\/a><\/li>\n<li><a href=\"#embark\">EMBARK: Evaluation of Mapping NLP based Algorithms into Reconfigurable Computing Kernels<\/a><\/li>\n<li><a href=\"#havoc\">HAVoC: Hardened Adversarial Challenge<\/a><\/li>\n<li><a href=\"#redsharc\">Redsharc: Reconfigurable Data Stream Hardware\/Software Architecture<\/a><\/li>\n<li><a href=\"#rhino\">RHinO: Reconfigurable Hardware in Orbit<\/a><\/li>\n<li><a href=\"#scx\">SCX: SpaceCubeX<\/a><\/li>\n<li><a href=\"#spicy\">SPICY: Hot &amp; Spicy: Improving Productivity with Python and HLS for FPGAs<\/a><\/li>\n<li><a href=\"#torc\">TORC: Tools for Open Reconfigurable Computing<\/a><\/li>\n<li><a href=\"#sapient\">SAPIENT: Scalable Acceleration Platform Integrating Reconfigurable Computing and Natural Language Processing Technologies<\/a><\/li>\n<\/ul>\n<\/header>\n<article>\n    <section><img decoding=\"async\" loading=\"lazy\" src=\"https:\/\/www.isi.edu\/research-groups-rcg\/wp-content\/uploads\/sites\/17\/2022\/11\/bitbandit.jpg\" alt=\"Binary Ones and Zeros Falling Down\"\/><\/section>\n    <section><h2>BitBandit<\/h2><p>BitBandit is a self-contained SoC fault injector for a processor&#8217;s general\/special purpose registers and instruction\/data caches for FPGA devices. Faults are injected through a combination of hardware and software running within the processor and FPGA fabric. BitBandit supports scalable fault injection campaigns to emulate malicious and\/or environmental corruptions. The initial release of BitBandit open-source infrastructure supports Xilinx Virtex4 FX devices with an integrated PowerPC 405 processor.<\/p><\/section>\n<\/article>\n<article>\n    <section><h2>COMBAT: Cooperative Multicast and Broadcast at the Tactical Edge<\/h2><p>Enabling next generation low latency protocols in software defined radios.<a href=\"https:\/\/www.isi.edu\/research-groups-rcg\/projects\/completed-projects\/combat\/\">Learn More<\/a><\/p><\/section>\n    <section><img decoding=\"async\" loading=\"lazy\" src=\"https:\/\/www.isi.edu\/research-groups-rcg\/wp-content\/uploads\/sites\/17\/2022\/04\/iStock-11628666331.jpg\" alt=\"Five Fighter Jets Flying in Formation\"\/><\/section>\n<\/article>\n<article>\n    <section><img decoding=\"async\" loading=\"lazy\" src=\"https:\/\/www.isi.edu\/research-groups-rcg\/wp-content\/uploads\/sites\/17\/2022\/03\/embark_thum1.jpg\" alt=\"Natural Language Processing Word Cloud\"\/><\/section>\n    <section><h2>EMBARK: Evaluation of Mapping NLP based Algorithms into Reconfigurable Computing Kernels<\/h2><p>With advancements in high-speed interfaces, integrated DSP hard IP, and on-chip memory densities, FPGAs can leverage pipe-lining and parallelism to compensate for limitations like slower clock rates etc<a href=\"https:\/\/www.isi.edu\/research-groups-rcg\/projects\/completed-projects\/embark\/\">Learn More<\/a><\/p><\/section>\n<\/article>\n<article>\n    <section><h2>HAVoC: Hardened Adversarial Challenge<\/h2><p>Adversarial challenge development for the DARPA VET program for FPGAs.<a href=\"https:\/\/www.isi.edu\/research-groups-rcg\/projects\/completed-projects\/havoc\/\">Learn More<\/a><\/p><\/section>\n    <section><img decoding=\"async\" loading=\"lazy\" src=\"https:\/\/www.isi.edu\/research-groups-rcg\/wp-content\/uploads\/sites\/17\/2022\/03\/havoc2.png\" alt=\"Circuit with Skull in the Middle\"\/><\/section>\n<\/article>\n<article>\n    <section><img decoding=\"async\" loading=\"lazy\" src=\"https:\/\/www.isi.edu\/research-groups-rcg\/wp-content\/uploads\/sites\/17\/2022\/11\/redsharc.jpg\" alt=\"Futurustic City Resembling a Microchip\"\/><\/section>\n    <section><h2>Redsharc: Reconfigurable Data Stream Hardware\/Software Architecture<\/h2><p>The Reconfigurable Data Stream Hardware\/Software Architecture (Redsharc) is a set of IP &amp; API to migrate sequential software to parallel hw\/sw MPSoC. Redsharc simplifies control of the system: scheduling\/mapping, communication, and data transfer between cores and enables application to scale over different configurations of cores.<\/p><\/section>\n<\/article>\n<article>\n    <section><h2>RHinO: The Reconfigurable Hardware in Orbit<\/h2><p>The Reconfigurable Hardware in Orbit (RHinO) project is focused on creating a set of design tools that facilitate and automate design techniques for reconfigurable computing in space, using SRAM-based field-programmable-gate-array (FPGA) technology.<a href=\"https:\/\/www.isi.edu\/research-groups-rcg\/projects\/completed-projects\/rhino\">Learn More<\/a><\/p><\/section>\n    <section><img decoding=\"async\" loading=\"lazy\" src=\"https:\/\/www.isi.edu\/research-groups-rcg\/wp-content\/uploads\/sites\/17\/2022\/11\/rhino.jpg\" alt=\"Earth in virtual world\"\/><\/section>\n<\/article>\n<article>\n    <section><img decoding=\"async\" loading=\"lazy\" src=\"https:\/\/www.isi.edu\/research-groups-rcg\/wp-content\/uploads\/sites\/17\/2022\/03\/space11.jpg\" alt=\"Astronaut outside of space station wearing spacesuit\"\/><\/section>\n    <section><h2>SCX: SpaceCubeX<\/h2><p>Heterogeneous on board computing platforms to support next generation Earth science missions.<a href=\"https:\/\/www.isi.edu\/research-groups-rcg\/projects\/completed-projects\/spacecubex\/\">Learn More<\/a><\/p><\/section>\n<\/article>\n<article>\n    <section><h2>SPICY: Hot &amp; Spicy: Improving Productivity with Python and HLS for FPGAs<\/h2><p>Hot &amp; Spicy is an open-source infrastructure and tool suite for integrating FPGA accelerators in Python applications, provided entirely as Python source code. This suite of tools eases the packaging, integration, and binding of accelerators and their C\/C++ based drivers callable from a Python application. The tools can:<ol><li>Translate Python functions to HLS-suitable C functions<\/li><li>Generate Python C wrapper bindings<\/li><li>Automate the FPGA EDA tool flow<\/li><li>Retarget Python source code to use accelerated libraries<\/li><\/ol>For FPGA experts, this enables increased productivity and supports research on each stage of the flow by providing a framework to integrate additional compilers and optimizations. For everyone else this enables fast, consistent, acceleration of applications on FPGAs.<a href=\"https:\/\/github.com\/ISI-RCG\/spicy\" target=\"_blank\" rel=\"noopener\">Tools and Source Code<\/a><\/p><\/section>\n    <section><img decoding=\"async\" loading=\"lazy\" src=\"https:\/\/www.isi.edu\/research-groups-rcg\/wp-content\/uploads\/sites\/17\/2022\/11\/spicy.jpg\" alt=\"Microchip\"\/><\/section>\n<\/article>\n<article>\n    <section><img decoding=\"async\" loading=\"lazy\" src=\"https:\/\/www.isi.edu\/research-groups-rcg\/wp-content\/uploads\/sites\/17\/2022\/11\/torc.jpg\" alt=\"TORC Logo\"\/><\/section>\n    <section><h2>TORC: Tools for Open Reconfigurable Computing<\/h2><p>Torc is an open-source C++ infrastructure and tool set for reconfigurable computing.\u00a0 It is suitable for custom research applications, for CAD tool development, for architecture exploration, and for any application that needs to work with real-world physical device data.\u00a0 Torc can serve as the basis for research in synthesis, mapping, placing, and routing.\u00a0 It may also prove to be useful in productivity enhancements, power optimization, radiation tolerance, security, and other domains that are sometimes overlooked by the commercial industry.<a href=\"http:\/\/torc-isi.github.io\/torc\" target=\"_blank\" rel=\"noopener\">TORC on GitHub<\/a><\/p><\/section>\n<\/article>\n<article>\n    <section><h2 data-stringify-type=\"pre\">SAPIENT: Scalable Acceleration Platform Integrating Reconfigurable Computing and Natural Language Processing Technologies<\/h2><p>\u00a0The SAPIENT project encompasses several capabilities to accelerate Natural Language Processing tasks on Field-Programmable Gate Array based High-Performance Computing systems.<a href=\"https:\/\/www.isi.edu\/research-groups-rcg\/projects\/current-projects\/sapient\/\">Learn More<\/a><\/p><\/section>\n    <section><img decoding=\"async\" loading=\"lazy\" src=\"https:\/\/www.isi.edu\/research-groups-rcg\/wp-content\/uploads\/sites\/17\/2023\/09\/iStock-1060622854.jpg\" alt=\"Profile of the face of a child made with binary and circuits\"\/><\/section>\n<\/article>\n","protected":false},"excerpt":{"rendered":"<p>Completed Projects BitBandit COMBAT: Cooperative Multicast and Broadcast at the Tactical Edge EMBARK: Evaluation of Mapping NLP based Algorithms into Reconfigurable Computing Kernels HAVoC: Hardened Adversarial Challenge Redsharc: Reconfigurable Data Stream Hardware\/Software Architecture RHinO: Reconfigurable Hardware in Orbit SCX: SpaceCubeX SPICY: Hot &amp; Spicy: Improving Productivity with Python and HLS for FPGAs TORC: Tools for&hellip;<\/p>\n","protected":false},"author":421,"featured_media":0,"parent":40,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"news_source":"","news_author":"","external_news_link":"","footnotes":""},"class_list":["post-290","page","type-page","status-publish","hentry"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.6 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>Historical Projects - Reconfigurable Computing Group<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.isi.edu\/research-groups-rcg\/projects\/historical-projects\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Historical Projects - Reconfigurable Computing Group\" \/>\n<meta property=\"og:description\" content=\"Completed Projects BitBandit COMBAT: Cooperative Multicast and Broadcast at the Tactical Edge EMBARK: Evaluation of Mapping NLP based Algorithms into Reconfigurable Computing Kernels HAVoC: Hardened Adversarial Challenge Redsharc: Reconfigurable Data Stream Hardware\/Software Architecture RHinO: Reconfigurable Hardware in Orbit SCX: SpaceCubeX SPICY: Hot &amp; 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