Jeff is a member of the Computational Sciences Division at USC/ISI and is currently working on the DARPA Trust in Integrated Circuits and Radiation Hardening by Design programs. Prior to this research, he participated in the micro-architecture development and led the ISI VLSI team on the Morphable Networked Architecture (MONARCH) project, which yielded a polymorphous computing chip in IBM 90nm technology. Details can be found in this ISI news story. He also directed the VLSI development of two PIM chips: one associated with the Godiva project, a collaboration with HP Labs and Rice University, and the other as part of the Data-Intensive Architecture (DIVA) project. Both PIM chips contain on the order of 55 million transistors and were fabricated in TSMC 0.18um technology. Some details can be found in ISI news stories on DIVA and Godiva. More details can be found in the publications link on Jeff's home page. His main research interests are parallel computer architectures, VLSI, and interconnection networks. He is a member of the IEEE Computer Society, Tau Beta Pi, Eta Kappa Nu, and Phi Kappa Phi.
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