Publications

2023

RPU: The Ring Processing Unit
D. Soni, N. Neda, N. Zhang, B. Reynwar, et al
TREBUCHET: Fully Homomorphic Encryption Accelerator for Deep Computation
D. B. Cousins, Y. Polyakov, A. A. Badawi, M. French, et al

2022

Untangling IP Protection via Learning and Structure
D. Chen, X. Zhou, S. Chowdhury, P. Beerel, P. Nuzzo, and M. French
StereoBit on the SpaceCube Mini
J. Carr, C. Wilson, D. Wu, M. French, M. Paolieri, H. Madani, M. Kelly
Bitstream Assurance Checking Engine for Undocumented Functionality
A. Schmidt, J. Wilford, B. Reynwar, T. Sung, and M. French
Bitstream Assurance Checking Engine for Undocumented Functionality (BRACE)
Andrew G. Schmidt and Justin Wilford and Benedict Reynwar and Ting-Yuan Sung and Matthew French
Towards full-stack acceleration for fully homomorphic encryption
N. Zhang, H. Gamil, P. Brinich, B. Reynwar, et al

2021

Canary: An FPGA Assurance Plugin for Vendor EDA Tools
D. Glick, A. Schmidt, J. Nifong, T. Haroldsen, J. Monson E. M. Ruiz, and M. French
Design and Performance Evaluation of Multispectral Sensing Algorithms on CPU, GPU, and FPGA
V. Menon, S. Siddiqui, S. Rao, A. Schmidt, V. Chirayath, A. Li, and M. French
Independent Testing of Untrusted FPGAs for Faulty Interconnnect
T. Haroldsen, M. French, T. Sung, D. Glick, J. Danner, L. Lerner
Fight Club: Maturing Defense in Depth Obfuscation Techniques
V. Menon, U. Sharma, S. Roshanisefat, S. Shukla, A. Schmidt, M. French, P. Beerel, and P. Nuzzo
{Integrated constellation analysis tools to support new observing strategy mission design}
Christopher D. Ball and I. Josue Tapia-Tamayo and Marco Paolieri and Andrew J. O'Brien and Matthew French and Joel T. Johnson and Paul Grogan
Independent Testing of Untrusted FPGAs for Faulty Interconnnect
T. Haroldsen and M. French and T. Sung and D. Glick and J. Danner and L. Lerner
Canary: An FPGA Assurance Plugin for Vendor EDA Toolst
D. Glick and A. Schmidt and J. Nifong and T. Haroldsen and J. Monson and E. M. Ruiz and M. French
Fight Club: Maturing Defense in Depth Obfuscation Techniques
Vivek V. Menon and Uddipt Sharma and Shervin Roshanisefat and Sanket S. Shukla and Andrew G. Schmidt and Matthew French and Peter A. Beerel and Pierluigi Nuzzo
Design and Performance Evaluation of Multispectral Sensing Algorithms on CPU, GPU, and FPGA
Vivek V Menon and Saquib A. Siddiqui and Sanil Rao and Andrew G. Schmidt and Matthew French and Ved Chirayath and Alan Li
Canary: An FPGA Assurance Plugin for Vendor EDA Tools
Dallon Glick and Andrew G. Schmidt and Jude Nifong and Travis Haroldsen and Joshua Monson and E. M. Ruiz and Matthew French

2020

Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking
Benjamin Tan and Ramesh Karri and Nimisha Limaye and Abhrajit Sengupta and Ozgur Sinanoglu and Md Moshiur Rahman and Swarup Bhunia and Danielle Duvalsaint and R. D. and Blanton and Amin Rezaei and Yuanqi Shen and Hai Zhou and Leon Li and Alex Orailoglu and Zhaokun Han and Austin Benedetti and Lucian
Logic Obfuscation: Modeling Attack Resiliency
V. Menon, G. Kolhe, J. Fifty, A. Schmidt, J. Monson, M. French, Y. Hu, P. Beerel, P. Nuzzo
StereoBit: StereoBit: An innovative SpaceCube Application for Atmospheric Science
J. Carr, C. Wilson, D. Wu, M. French, M. Kelly
Emulating and Verifying Sensing, Computation, and Communication in Distributed Remote Sensing Systems
M. French, M. Paolieri, V. Menon, A. Schmidt
Evaluation of Remote-Sensing Architectures using the Virtual Constellation Engine
M. Paolieri, V. Menon, A. Schmidt, and M. French
Emulating and Verifying Sensing, Computation, and Communication in Distributed Remote Sensing Systems
Matthew French and Marco Paolieri and Vivek Menon and Andrew G. Schmidt
FPGA Virtualization for Deprecated Devices
Ian Taras and Andrew G. Schmidt
Logic Obfuscation: Modeling Attack Resiliency
Vivek Menon and Kolhe, Gaurav and Joseph Fifty and Andrew G. Schmidt and Monson, Joshua and French, M. and Hu, Yinghua and Beerel, Peter and Nuzzo, Pierluigi

2019

Enhanced Independent Functional Testing of Xilinx FPGAs
T. Haroldsen, M. French, A. Schmidt, and D. Khamar
System-Level Framework for Logic Obfuscation with Quantified Metrics for Evaluation
V. Menon, G. Kohle, A. G. Schmidt, J. Monson, M. French, Y. Hu, and P. Nuzzo
Security-driven metrics and models for efficient evaluation of logic encryption schemes
Yinghua Hu, Vivek V. Menon, Andrew G. Schmidt, Joshua S. Monson, Matthew French, Pierluigi Nuzzo
Constellations in the Cloud: Virtualizing Remote Sensing Systems
A. G. Schmidt, V. Venugopalan, M. Paolieri, and M. French
Quantifying Security and Overheads for Obfuscation of Integrated Circuits
V. Venugopalan, G. Kolhe, A. Schmidt, J. Monson, M. French, Y. Hu, P. A. Beerel, P. Nuzzo
Enhanced Independent Functional Testing of Xilinx FPGAs
T. Haroldsen and M. French and A. Schmidt and D. Khamar
Impact of Off-Chip Memories on HLS-Generated Circuits
Abhi D. Rajagopala and Ron Sass and Andrew G. Schmidt
Design Considerations for Mapping FPGA High-Level Synthesis Algorithms to Next-Generation Memory Devices
Abhi D. Rajagopala and Ron Sass and Andrew G. Schmidt
Constellations in the cloud: Virtualizing remote sensing systems
Andrew G. Schmidt and Venugopalan, Vivek and Marco Paolieri and French, M.
System-Level Framework for Logic Obfuscation with Quantified Metrics for Evaluation
Vivek V. Menon and G. Kolhe and Andrew G. Schmidt and J. {Monson} and French, M. and Hu, Y. and P. A. Beerel and P. Nuzzo
Security-driven Metrics and Models for Efficient Evaluation of Logic Encryption Schemes
Yinghua Hu and Vivek V. Menon and Andrew Schmidt and Joshua Monson and Matthew French and Pierluigi Nuzzo
Quantifying Security and Overheads for Obfuscation of Integrated Circuits
Vivek Venugopalan and G. Kolhe and Andrew G. Schmidt and Joshua Monson and Matthew French and Hu, Y. and P. A. Beerel and P. Nuzzo
Enhanced Independent Functional Testing of Xilinx FPGAs
Travis Haroldsen and Matthew French and Andrew G. Schmidt and D. Khamar
Volcan: System Integration of HLS and HMC with FPGAs
Abhi D. Rajagopala and Ron Sass and Andrew G. Schmidt

2018

Improved Metrics for Obfuscated ICs Government Microcircuit Applications and Critical Technology Conference (GOMACTech)
M. Zhu, M. French, and P. Beerel
Hot and Spicy: Improving Productivity with Python and HLS for FPGAs
S. Skalick} and J. Monson and A. Schmidt and M. French
SpaceCubeX2: Heterogeneous On-board Processing for Distributed Measurement and Multi-Satellite Missions
Matthew French and Andrew G. Schmidt and Sam Skalicky and Thomas Flately and Gary Crum and Alexander Geist and Ved Chirayath and Alan Li
Independent Functional Testing of Commercial FPGA Devices
Travis Haroldsen and Matthew French and Andrew G. Schmidt
Hot \& Spicy: Improving Productivity with Python and HLS for FPGAs
Sam Skalicky and Monson, Joshua and Andrew G. Schmidt and French, M.
Bridging the Gap between Advanced Memory and Heterogeneous Architectures
Abhilash Devalapura Rajagopala and Ron Sass and Andrew G. Schmidt and Matthew French

2017

Radiation hardening by software techniques on FPGAs: Flight experiment evaluation and results
A. G. Schmidt and M. French and T. Flatley
Irrefutable Tamper Logging through FPGA Key Management
Jonathan Graf, Ali Asgar Sohangpurwala, Matthew French, and Andrew Schmidt
SpaceCubeX: A framework for evaluating hybrid multi-core CPU/FPGA/DSP architectures
A. G. Schmidt and G. Weisz and M. French and T. Flatley and C. Y. Villalpando
Initial Approaches for Discovery of Undocumented Functionality in FPGAs
M. French, A. Schmidt, A. Dasu
Evaluating Rapid Application Development with Python for Heterogeneous Processor-Based FPGAs
A. G. Schmidt and G. Weisz and M. French
Evaluating Rapid Application Development with Python for Heterogeneous Processor-based FPGAs
Andrew G. Schmidt and Weisz, Gabriel and French, M.
Radiation Hardening by Software Techniques on FPGAs: Flight Experiment Evaluation and Results
Andrew G. Schmidt and French, M. and Flatley, Thomas
Initial Approaches for Discovery of Undocumented Functionality in FPGAs
Andrew G. Schmidt and Matthew French and Aravind Dasu
SpaceCubeX: A Framework for Evaluating Hybrid Multi-Core CPU FPGA DSP Architectures
Andrew G. Schmidt and Gabriel Weisz and Matthew French and Thomas Flatley and Carlos Y. Villalpando

2016

Real-Time Anomaly Detection Framework for Many-Core Router Through Machine-Learning Techniques
Kulkarni, Amey and Pino, Youngok and French, Matthew and Mohsenin, Tinoosh

2015

A unified hardware/software MPSoC system construction and run-time framework
S. {Skalicky} and A. G. Schmidt and S. Lopez and M. French
Experimental quantum annealing: case study involving the graph isomorphism problem
Zick KM, Shehab O, French M
Non-Intrusive Wireless Links in Commodity Devices
J. Couch, N. Steiner, A. Schmidt, W. Headley, P. Athanas, R. McGwier, A. Poetter, S. Rowe, M. French
A Unified Hardware/Software MPSoC System Construction and Run-Time Framework
Sam Skalicky and Andrew G. Schmidt and Sonia Lopez and French, M.
A Parallelizing Matlab Compiler Framework and Run time for Heterogeneous Systems
Sam Skalicky and Sonia Lopez and Marcin Lukowiak and Andrew G. Schmidt

2014

Intra-die process variation aware anomaly detection in FPGAs
Y. {Pino} and V. {Jyothi} and M. {French}
High Level Hardware/Software Embedded System Design with Redsharc
Sam Skalicky and Andrew G. Schmidt and Matthew French
High-precision self-characterization for the LUT burn-in information leakage threat
K. M. {Zick} and and M. {French}
Content-Oriented Mobile Edge Technology System Integration Framework and Field Evaluation
Z. {Cao} and M. {French} and R. {Krishnan} and J. {Ng} and D. {Talmage} and Q. {Zhang}
High Level Hardware/Software Embedded System Design with Redsharc
Sam Skalicky and Andrew G. Schmidt and French, M.

2013

Open-Source Bitstream Generation
Ritesh Kumar Soni and Neil Steiner and Matthew French
A Practical Characterization of a NASA SpaceCube Application Through Fault Emulation and Laser Testing
Walters, John Paul and Zick, Kenneth M. and French, Matthew
Fast Lossless Image Compression with Radiation Hardening By Hardware/Software Co-Design on Platform FPGAs
Andrew G. Schmidt and French, M.

2012

An Evaluation of an Integrated On-Chip/Off-Chip Network for High Performance Reconfigurable Computing
Andrew G. Schmidt and William V. Kritikos and Shanyuan Gao and Ron Sass
HwPMI: An Extensible Performance Monitoring Infrastructure for Improving Hardware Design and Productivity on FPGAs
Andrew G. Schmidt and Neil Stiner and French, M. and Ron Sass
Integrating Fast Lossless Compression Prediction with Radiation Hardening by Software on FPGAs
Andrew G. Schmidt and John Paul Walters and French, M. and Didier Keymeulen and Nazeeh Aranki and Matthew Klimesh and Aaron Kiely
Redsharc: A programming model and on-chip network for multi-core systems on a programmable chip
William V. Kritikos and Andrew G. Schmidt and Ron Sass and Erik K. Anderson and French, M.
Applying radiation hardening by software to fast lossless compression prediction on FPGAs
Andrew G. Schmidt and John Paul Walters and Kenneth M. Zick and Matthew French and Didier Keymeulen and Nazeeh Aranki and Matthew Klimesh and Aaron Kiely

2011

Software fault tolerance methodology and testing for the embedded PowerPC
Bucciero, M. and Walters, J.P. and French, M.
Torc: towards an open-source tool flow
Steiner, Neil and Wood, Aaron and Shojaei, Hamid and Couch, Jacob and Athanas, Peter and French, Matthew
Checkpoint/Restart and Beyond: Resilient High Performance Computing with FPGAs
Schmidt, A.G. and Bin Huang and Sass, R. and French, M.
The PowerPC 405 Memory Sentinel and Injection System
Bucciero, M. and Walters, J.P. and Moussalli, R. and Shanyuan Gao and French, M.
Radiation Hardening of FPGA-embedded CPUs via Software, Validated with Fault Emulation
Walters, J.P. and Zick, K.M. and French, M.
Autonomous On-board Processing for Sensor Systems: Initial Fault Tolerance and Autonomy Results
French, Matthew and Walters, John Paul and Bucceiro, Mark
Reconfigurable Computing Cluster Project: A Five-Year Perspective of the Project
Ron Sass and Andrew G. Schmidt and Scott Buscemi
Investigation into Scaling I/O Bound Streaming Applications Productively with an all-FPGA Cluster
Andrew G. Schmidt and Siddhartha Datta and Ashwin A. Mendon and Ron Sass
Checkpoint/Restart and Beyond: Resilient High Performance Computing with FPGAs
Andrew G. Schmidt and Bin Huang and Ron Sass and French, M.
Improving Design Productivity with a Hardware Performance Monitoring Infrastructure
Andrew G. Schmidt and Ron Sass
A Radix Tree Router for Scalable FPGA Networks
William V. Kritikos and Yamuna Rajasekhar and Andrew G. Schmidt and Ron Sass

2010

Merging Programming Models and On-chip Networks to Meet the Programmable and Performance Needs of Multi-core Systems on a Programmable Chip
Schmidt, A.G. and Kritikos, W.V. and Sass, R. and Anderson, E.K. and French, M.
Radiation Hardening by Software for the Embedded PowerPC, Preliminary Findings
Walters, John Paul and Bucciero, Mark and French, Matthew
Autonomous On-board Processing for Sensor Systems: High Performance Fault Tolerance Techniques
French, Matthew and Walters, John Paul and Bucceiro, Mark
Investigating Resilient High Performance Reconfigurable Computing with Minimally-Invasive System Monitoring
Bin Huang and Andrew G. Schmidt and Ashwin A. Mendon and Ron Sass
Embedded Systems Design with Platform FPGAs: Principles \& Practices
Ron Sass and Andrew G. Schmidt
Merging Programming Models and On-Chip Networks to Meet the Programmable and Performance Needs of Multi-Core Systems on a Programmable Chip
Andrew G. Schmidt and William V. Kritikos and Ron Sass and Erik K. Anderson and French, M.
Impact of Reconfigurable Hardware on Accelerating MPI_Reduce
Shanyuan Gao and Andrew G. Schmidt and Ron Sass
Productively Scaling I/O Bound Streaming Applications with a Cluster of FPGAs
Andrew G. Schmidt and Siddhartha Datta and Ashwin A. Mendon and Ron Sass
Redsharc: An Abstract Stream Programming Model for FPGAs
William V. Kritikos and Andrew G. Schmidt and Ron Sass and Erik K. Anderson and Michel Sika and Matthew French

2009

AIREN: A Novel Integration of On-Chip and Off-Chip FPGA Networks
Andrew G. Schmidt and William V. Kritikos and Rahul R. Sharma and Ron Sass
Hardware Implementation of MPI_Barrier on an FPGA Cluster
Shanyuan Gao and Andrew G. Schmidt and Ron Sass
A Hardware Filesystem Implementation with Multi-Disk Support
Ashwin Mendon and Andrew G. Schmidt and Ron Sass
Initial Implementation of a Hardware File System with Multiple Disk Support
Ashwin Mendon and Andrew G. Schmidt and Ron Sass

2008

System on a Programmable Chip Adapation Through Active Partial Reconfiguration
Anderson, Erik and Kang, Dong-In and French, Matthew
Autonomous System on a Chip Adaptation through Partial Runtime Reconfiguration
French, M. and Anderson, E. and Dong-In Kang
Reconfigurable Computing Cluster Project: Phase I Brief
Andrew G. Schmidt and William V. Kritikos and Siddhartha Datta and Ron Sass
FPGA Session Control (FSC): Providing Remote Access to A Cluster of FPGAs
Yamuna Rajasekhar and Yashodhan Phatak and Andrew G. Schmidt and William V. Kritikos and Ron Sass
Teaching FPGA System Design via a Remote Laboratory Facility
Yamuna Rajasekhar and William V. Kritikos and Andrew G. Schmidt and Ron Sass

2007

Reconfigurable Computing Cluster (RCC) Project: Investigating the Feasibility of FPGA-Based Petascale Computing
Ron Sass and William V. Kritikos and Andrew G. Schmidt and Srinivas Beeravolu and Parag Beeraka and Kushal Datta and David Andrews and Richard S. Miller and Daniel Stanzione, Jr.
Quantifying Effective Memory Bandwidth of Platform FPGAs
Andrew G. Schmidt and Ron Sass
Characterizing Effective Memory Bandwidth of Designs with Concurrent High-Performance Computing Cores
Andrew G. Schmidt and Ron Sass

2006

Reducing Power Consumption of Radiation Mitigated Designs for FPGAs
French, Matthew and Wang, Li and Wirthlin, Michael and Graham, Paul
An Evaluation of Software Fault Tolerance Techniques on a Tiled Architecture
Singh, Karandepp and Agbaria, Adnan and Kang, Dong-In and French, Matthew
Cross Functional Design Tools for Radiation Mitigation and Power Optimization of FPGA Circuits
French, Matthew and Graham, Paul and Wirthlin, Michael and Larchev, Greg and Wang, Li
FPGA dynamic power minimization through placement and routing constraints
Wang, Li and French, Matthew and Davoodi, Azadeh and Agarwal, Deepak
Tolerating SEU Faults in the Raw Architecture
Singh, Karandepp and Agbaria, Adnan and Kang, Dong-In and French, Matthew
Power Visualization, Analysis, and Optimization Tools for FPGAs
French, Matthew and Wang, Li and Wirthlin, Michael

2005

Integrated Tool Suite for Post Synthesis FPGA Power Consumption Analysis
French, Matthew and Wang, Li and Wirthlin, Michael
Radiation Mitigation and Power Optimization Design Tools for Reconfigurable Hardware in Orbit
French, Matthew and Graham, Paul and Wirthlin, Michael and Larchev, Greg and Wang, Li
Post Synthesis Level Power Modeling of FPGAs
French, Matthew and Wang, Li and Anderson, Tyler and Wirthlin, Michael
Multiprocessor Performance for Polymorphous Computing Systems
Crago, Stephen and French, Matthew and Suh, Jinwoo and Chen, Chen

2004

A Power Efficient Image Convolution Engine for Field Programmable Gate Arrays
French, Matthew
Novel Signal Processing Architectures for Knowledge-based STAP Algorithms)
French, Matthew and Suh, Jinwoo and Crago, Stephen
Design Tools for Reconfigurable Hardware in Orbit (RHinO)
French, Matthew and Graham, Paul and Wirthlin, Michael and Larchev, Greg and Bellows, Peter

2003

Applications of adaptive computing systems for signal processing challenges
Schott, Brian and Bellows, Peter and French, Matthew and Parker, Robert
A performance analysis of PIM, stream processing, and tiled processing on memory-intensive signal processing kernels
Suh, Jinwoo and Kim, Eun-Gyu and Crago, Stephen P. and Srinivasan, Lakshmi and French, Matthew C.
A performance analysis of PIM, stream processing, and tiled processing on memory-intensive signal processing kernels
Suh, Jinwoo and Kim, Eun-Gyu and Crago, Stephen P. and Srinivasan, Lakshmi and French, Matthew C.

1999

Architectures for System-Level Applications of Adaptive Computing
Schott, Brian and Chen, Chen and Crago, Steve and Czarnaski, Joe and French, Matt and Hom, Ivan and Tho, Tam and Valenti, Terri