Videos
Inside a Chip
Volume Rendering of Integrated Circuit in 90nm Technology Using x-ray Computer Tomography
- Area shown: 10um x 10um
- Layers visible: Contact layer through Metal 3
- Produced by University of Southern California Information Sciences Institute using Xradia x-ray microscope at Stanford Synchrotron Radiation Laboratory
Approved for public release; distribution unlimited
This work was sponsored by Defense Advanced Research Projects Agency Microsystems Technology Office (MTO). Program "Enhancing trust X-ray Phase-Optimized Scanning Equipment (EXPOSE) ARPA Order No. X040/07 Program Code: 7720 Issued by DARPA/CMO under Contract No. HR0011-07-C-0102.
Virtual De-layering of an IC
Virtual Delayering of Integrated Circuit in 90nm Technology Using x-ray Computed Tomography
- Area shown: 10um x 10um x ~ 8 um height
- Layers visible: Contact layer through Metal 9
- Produced by University of Southern California Information Sciences Institute using Xradia x-ray microscope at Stanford Synchrotron Radiation Laboratory
Approved for public release; distribution unlimited