Matthew French

Director, SURE

Assistant Director, ISI Computational Systems and Technology division

Matthew French is a research director in the Computational Sciences and Technology division at the USC Information Sciences Institute. He oversees the Reconfigurable Computing group, which performs research in application mapping, hardware /software co-design, CAD tools and front-end ASIC design.

French has led research projects investigating trust, integrity and reliability of integrated circuits; ultra-low power, cognitive and autonomous systems; and systems for space and other demanding environments. The reconfigurable computing group has explored programmable gate arrays and novel embedded computing designs, with a focus on tool development, intelligent control, and application mapping for industry and federal sponsors such as DARPA, IARPA, NASA and the NRO.

French joined ISI in 1998 from Lockheed Sanders (now BAE Systems), has authored more than 30 publications and holds two patents. He received his MEEE from Cornell University.

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Ajey Jacob

Director of Advanced Electronics

Ajey Jacob is the Director of the Application Specific Intelligent Computing (ASIC) Lab, a hardware research group at the University of Southern California's Information Sciences Institute (ISI). Ajey Jacob brings 16 years of industry research, development, and manufacturing experience from Intel Corporation and GLOBAFOUNDRIES (GF) to ISI. Ajey primarily focuses on materials, devices, integration, and fabrication aspects of the advanced and differentiating technology research.

Ajey Jacob received his Ph.D. in Physics from the Chalmers University of Technology/Gothenburg University, Gothenburg, Sweden, in 2002. Ajey Jacob has more than 200 worldwide patents (177 USPTO issued/accepted patents, more than 50 patents pending USPTO approval). He has also published three book chapters, more than 75 journals, and conference papers in a wide area of scaled and differentiating technologies.

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Lifu Chang

Director of The MOSIS Service

Dr. Chang obtained his Ph.D. degree from Purdue University in 1996, in area of solid state electronics. He has published nearly 50 journal and conference papers and holds multiple US patents. He received the Elected Membership Award from American Association for the Advancement of Science in 2001. He is a Senior Member of IEEE. He serves in SPIE, The International Society for Optics and Photonics, as committee member for the Design and Process Technology Co-Optimization Program.

Prior to joining ISI, Dr. Chang has had more than 20 years of work experience in semiconductor device, process technology, Electronic Design Automation (EDA), design enablement, and Design for Manufacturability (DFM) areas. He has held engineering and management positions in companies across EDA, foundry, and fabless design companies. He pioneered DFM technology when he worked as R&D Manager at Clear Shape Technologies. His work resulted in patents that laid critical foundations of multiple DFM EDA tool flows in use worldwide today. He then joined Semiconductor Manufacturing International Corporation, “SMIC” as the Director of Technology Based Design Enablement. At SMIC, he built and led teams of DFM, TCAD, Design Rule, Reliability, Technology IP, etc. to achieve yield enhancement in state-of-the-art design enablement environments. Dr. Chang then joined Qualcomm as the Director of Engineering. He led the DFM Team to achieve high yield for products including Mobile Application Processor SOC, Modem, RF wireless transceiver, Power Management IC, etc. He led the entire company to learn and collaborate with foundries in DFM throughout the product and technology development cycles.

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