John Heidemann

Leads a research group analyzing Internet traffic and topology, and developing new techniques for privacy-sensitive measurement and operation of critical infrastructure.

ISI News

Twitter Bot Analysis Receives Wide Media Coverage

An analysis of Twitter bots led by ISI's Emilio Ferrara is garnering high-profile media coverage around the globe.

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Bradley Fidler Named Postel Scholar

Bradley Fidler, an Internet researcher and historian at the University of California, Los Angeles (UCLA), has been appointed a visiting scholar at ISI's Postel Center for Experimental Networking.

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Spanish Newspaper Features ISI Fake Bots Analysis

Emilio Ferrara's work on fake Twitter bots was reported in the February 11, 2017 edition of El Periódico de Catalunya, a major Spanish newspaper based in Barcelona.

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Feature Story

What's Going On: Heterogeneous Computing

March 9, 2017

Andrew Schmidt is in favor of lowering entry barriers in computing-intensive fields, where fewer obstacles translate into faster innovation.

In his year-end 2016 seminar, Schmidt described the productivity wall that field programmable gate array (FPGA) chips typically encounter, and how a mix of fresh approaches that leverage existing community tools can help overcome those barriers.

The talk to 20 attendees in Arlington, Virginia and Marina del Rey, California was part of ISI's "What's Going On" breakfast series, which deepens researchers' knowledge of work across the Institute. Schmidt began with the concept of heterogeneous computing: systems with multiple processor types whose specialized characteristics enable power and performance gains. Common examples range from graphics processors in super computers to embedded systems with FPGAs.

Once an afterthought, heterogeneous systems are now commanding industry attention, including Intel Corporation's 2015 acquisition of Altera Corporation for nearly $17 billion, its then-largest ever. The stars in these heterogeneous, high-performance computing are FPGAs: highly programmable chips that can change functions while running, theoretically enabling the same chip to power different applications.

FPGA capabilities include network, CPU and memory integration, along with parallelism, scalability and stream processing. Results include vast gains in power efficiency, speed and performance, including up to 60 times power efficiency and 95 percent performance gains. Unfortunately, achieving those gains is difficult and expensive due to complex, time-consuming programming requirements, relatively slow clock speeds and other factors.Read More

ISI Annual Report

View the 2016 ISI Annual Report.

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Feature Story

What's Going On: Heterogeneous Computing

March 9, 2017

Andrew Schmidt is in favor of lowering entry barriers in computing-intensive fields, where fewer obstacles translate into faster innovation.

In his year-end 2016 seminar, Schmidt described the productivity wall that field programmable gate array (FPGA) chips typically encounter, and how a mix of fresh approaches that leverage existing community tools can help overcome those barriers.

The talk to 20 attendees in Arlington, Virginia and Marina del Rey, California was part of ISI's "What's Going On" breakfast series, which deepens researchers' knowledge of work across the Institute. Schmidt began with the concept of heterogeneous computing: systems with multiple processor types whose specialized characteristics enable power and performance gains. Common examples range from graphics processors in super computers to embedded systems with FPGAs.

Once an afterthought, heterogeneous systems are now commanding industry attention, including Intel Corporation's 2015 acquisition of Altera Corporation for nearly $17 billion, its then-largest ever. The stars in these heterogeneous, high-performance computing are FPGAs: highly programmable chips that can change functions while running, theoretically enabling the same chip to power different applications.

FPGA capabilities include network, CPU and memory integration, along with parallelism, scalability and stream processing. Results include vast gains in power efficiency, speed and performance, including up to 60 times power efficiency and 95 percent performance gains. Unfortunately, achieving those gains is difficult and expensive due to complex, time-consuming programming requirements, relatively slow clock speeds and other factors.Read More