Publications

Export 87 results:
2004
M. C. French, J. Suh, and S. P. Crago, "Novel Signal Processing Architectures for Knowledge-based STAP Algorithms)", Proceedings of the 2004 IEEE Radar Conference (IEEE Cat. No.04CH37509), pp. xxvii+627, april, 2004.
M. C. French, J. Suh, and S. P. Crago, "Novel Signal Processing Architectures for Knowledge-based STAP Algorithms)", Proceedings of the 2004 IEEE Radar Conference (IEEE Cat. No.04CH37509), pp. xxvii+627, april, 2004.
2003
J. Suh, E. G. Kim, S. P. Crago, L. Srinivasan, and M. C. French, "A Performance Characterization of New Microprocessor paradigm on Data-Intensive Kernels", Workshop on Performance Characterization, Modeling, and Benchmarking for HPC Systems, May, 2003.
I. Sharapov, G. Lauterbach, and S. P. Crago, "Robust Highly-Connected Direct Interconnection Network Topologies", International Conference on Parallel and Distributed Processing Techniques and Applications, June, 2003.
J. Suh, D. Kang, and S. P. Crago, "Dynamic Power Management of Heterogeneous Systems", Eleventh International Workshop on Parallel and Distributed Real-Time Systems (WPDRTS) in conjunction with IPDPS, April, 2003.
W. W. Ro, J. L. Gaudiot, S. P. Crago, and A. M. Despain, "HiDISC: a decoupled architecture for data-intensive applications", International Parallel and Distributed Processing Symposium, April, 2003.
J. Suh, E. - G. Kim, S. P. Crago, L. Srinivasan, and M. C. French, "A performance analysis of PIM, stream processing, and tiled processing on memory-intensive signal processing kernels", Proceedings of the 30th annual international symposium on Computer architecture, New York, NY, USA, ACM, pp. 410–421, 2003.
J. Suh, E. - G. Kim, S. P. Crago, L. Srinivasan, and M. C. French, "A performance analysis of PIM, stream processing, and tiled processing on memory-intensive signal processing kernels", Proceedings of the 30th annual international symposium on Computer architecture, New York, NY, USA, ACM, pp. 410–421, 2003.
2002
B. Serebrin, J. D. Owens, C. H. Chen, S. P. Crago, U. J. Kapasi, B. Khailany, P. Mattson, J. Namkoong, S. Rixner, and W. J. Dally, "VLSI in Computers and Processors", IEEE International Conference on Computer Design: VLSI in Computers and Processors, September, 2002.
J. Suh, D. Kang, and S. P. Crago, "Dynamic Power Management of Multiprocessor Systems", Tenth International Workshop on Parallel and Distributed Real-Time Systems (WPDRTS) in conjunction with IPDPS, April, 2002.
P. M. Shriver, M. B. Gokhale, S. D. Briles, D. I. Kang, M. Cai, K. McCabe, S. P. Crago, and J. Suh, "A Power-Aware, Satellite-Based Parallel Signal Processing Scheme", Power Aware Computing, Series in Computer Science, Kluwer Academic/Plenum Publishers, 2002.
2001
J. Suh, S. P. Crago, C. Li, and R. Parker, "PIM- and Stream Processor-Based System", Fifth Annual High Performance Embedded Computing Workshop, November, 2001.
D. Kang, S. P. Crago, and J. Suh, "Power-Aware Design Synthesis Techniques for Distributed Real-Time Systems", ACM Workshop on Languages, Compilers, and Tools for Embedded Systems (LCTES) '01, June, 2001.
J. Suh, and S. P. Crago, "PIM- and Stream Processor-based Processing for Radar Signal Applications", The Third Workshop on Media and Streaming Processors in conjunction with The 34th International Symposium on Microarchitecture, December, 2001.
2000
J. Suh, S. P. Crago, C. Li, and R. Parker, "Distributed Corner Turn on a PIM-Based Multiprocessor", Fourth Annual Workshop on High Performance Embedded Computing (HPEC), September, 2000.
S. P. Crago, A. Despain, J. L. Gaudiot, M. Makhija, W. Ro, and A. Srivastava, "A High-Performance, Hierarchical Decoupled Architecture", MEmory access DEcoupling for superscalar and multiple issue Architectures (MEDEA) Workshop, October, 2000.