Publications

Clustering and fanout optimizations of asynchronous circuits

Abstract

BACKGROUND
For synchronous electronic circuits relying on clocks and timing circuitry, all data is synchronized by a global circuit clock. In between combinational logic blocks, latches (eg, flip-flops) are inserted, which function to latch the data once per period of the clock hence achieving the synchronization of data and control signals among the different circuit ele ments. In asynchronous circuits, synchronization is achieved through handshaking protocols that are implemented to assist the various circuit elements with the exchange of data. There are many styles of asynchronous design libraries and flows, and almost each one has a different handshaking mechanism associated with it.
For Handshaking protocols implemented for asynchro nous circuits, the handshaking between two asynchronous units exchanging data often starts with the unit where the data is originating from sending a request to the receiver …

Date
2013
Authors
G Dimou, PA Beerel, A Lines
Inventors
Georgios Dimou, Peter A Beerel, Andrew Lines
Patent_office
US
Patent_number
8448105
Application_number
12429772