Abstract

Edies type by at least one transistor dimension. Selected ones of the Subtypes for at least one of the cell types are merged thereby resulting in a Second plurality of Subtypes for the at least one of the cell types. The Second plurality of Subtypes being fewer than the first plurality of Subtypes. The merging of the Selected Subtypes achieves a balance between the objective function and a cost associated with maintaining the Selected Subtypes distinct.

Date

2005

Authors

F Eaton, P Beerel

Inventors

Frederik Eaton, Peter Beerel

Patent_office

US

Patent_number

6854096

Application_number

10620330