Publications
Apparatus and method for self-timed marking of variable length instructions having length-affecting prefix bytes
Abstract
Computer Systems are capable of executing various arith metic and logic operations on data. The particular arithmetic or logic operation to be executed is indicated by an “instruc tion” that is typically retrieved from a memory of the computer System, decoded in an instruction decode block, and then transmitted to an execution block of the computer for execution. Computer programs comprise a set of instruc tions that, when taken from memory, decoded and transmit ted to the execution block in a certain Sequence, cause the computer System to execute a Series of operations that achieve the objective of the program. There are computer Systems designed to implement a variable length instruction architecture, wherein instructions can vary in length from, for example, one byte to eleven bytes or more. However, memory Systems, and in particular the cache memory used to Store instructions prior to execution, typically …
- Date
- 1999
- Authors
- R Ginosar, R Kol, KS Stevens, PA Beerel, KY Yun, CJ Myers, S Rotem
- Inventors
- Ran Ginosar, Rakefet Kol, Kenneth Scott Stevens, Peter A Beerel, Kenneth Yi Yun, Christopher John Myers, Shai Rotem
- Patent_office
- US
- Patent_number
- 5948096
- Application_number
- 08997462