Publications

Physics of electronic transport in low-dimensionality materials for future FETs

Abstract

We show that scaling rules, quantum confinement in thin bodies, and the resulting gate leakage render imperative the use of low-dimensionality materials as channels in devices scaled beyond the 10 nm gate length. We then consider a few examples of two-dimensional materials of great interest, graphene and bilayer graphene, and show how the dielectric environment (gate and interlayer insulators, nearby gates) has a dramatically strong effect on the electronic properties of systems such as supported graphene, nanoribbons, and graphene bilayers in which a Bose-Einstein exciton condensation has been predicted to occur at high temperature. Finally, we consider the novel concept of devices based on monolayer tin (`stannanane') as a topological insulator.

Date
2014
Authors
Massimo V Fischetti, William G Vandenberghe, Bo Fu, S Narayanan, J Kim, Z-Y Ong, A Suarez-Negreira, C Sachs, SJ Aboud
Conference
2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)
Pages
1-4
Publisher
IEEE