Seminars and Events

CA DREAMS - Technical Seminar Series

Role of Advanced Packaging in Shaping the Semiconductor Industry

Event Details

April 24, 2026

Join Zoom Webinar

Passcode: 862998

Host: Steve Crago
POC: Amy Kasmir

Heterogeneous Integration (HI) is a powerful and crucial enabler for the continued growth of computing and communication performance by creating compact, power-efficient platforms for semiconductor devices. This talk will first review the evolution of packaging to set context, describe the tremendous opportunities in different application environments, and focus on the projected evolution of advanced packaging architectures. Key features in leading edge 2D and 3D technologies will be described, and a roadmap for their evolution will be presented. Specific examples, showing how product implementations take advantage of currently available HI technologies, to provide an unprecedented level of performance, will be used to describe the challenges and opportunities in developing robust, next generation advanced package architectures. The talk will end with a description of how well-defined industry-academia partnerships can continue to ensure successful evolution of the HI roadmap and landscape.

Speaker Bio

Ravi Mahajan is an Intel Fellow responsible Pathfinding innovative technologies for future Packaging Architectures. He is the Director of Technology and Pathfinding, in the Advanced Packaging Technology and Manufacturing Group in Intel Corporation. Dr. Mahajan joined Intel in 1992 after earning a Ph.D. in Mechanical Engineering from Lehigh University. He is a prolific inventor listed on more than 150 patent families, and has more than 550 patents and applications, including the original silicon bridge patents foundational for Intel’s Embedded Multi-Die Interconnect Bridge (EMIB) technology currently deployed in high-volume manufacturing for semiconductor devices and graphics parts. His early insights also led to high-performance, cost-effective cooling solutions for high-end microprocessors and the proliferation of photo-mechanics techniques used for thermo-mechanical stress model validation. He leads the IEEE-SEMI-ASME driven Heterogeneous Integration Roadmap (HIR) effort that underpins R&D efforts in packaging across multiple geographies. His contributions during his Intel career have earned him numerous industry honors, including:
  • SRC’s 2015 Mahboob Khan Outstanding Industry Liaison Award
  • 2016 THERMI Award from SEMITHERM
  • 2016 Allan Kraus Thermal Management Medal
  • 2018 InterPACK Achievement Award from ASME
  • 2019 Outstanding Service and Leadership to the IEEE Awards from IEEE Phoenix Section & Region 6
  • 2020 Richard Chu ITherm Award
  • 2020 ASME EPPD Excellence in Mechanics Award
  • 2026 William Chen Distinguished Service Award
He is one of the founding editors for the Intel Assembly and Test Technology Journal (IATTJ) and recently completed two terms as VP of Publications & Managing Editor-in-Chief of the IEEE Transactions of the CPMT. Ravi is a Fellow of two leading societies, ASME and IEEE, and was elected to the National Academy of Engineering in 2022 for contributions to advanced microelectronics packaging architectures and their thermal management.