Seminars and Events

CA DREAMS - Technical Seminar Series

Overview of High Bandwidth Memory (HBM) Packaging Technology

Event Details

July 24, 2026

Join Zoom Webinar

Passcode: 862998

Host: Steve Crago
POC: Amy Kasmir

The “Memory Wall”—the widening gap between fast processors and slower memory—has become the definitive bottleneck of the generative AI era. Today’s Large Language Models demand unprecedented data movement, making memory bandwidth the true measure of AI hardware efficiency. High Bandwidth Memory (HBM), enabled by advanced 2.5D packaging, has emerged as the critical architectural savior, stacking memory vertically and placing it directly alongside the AI processor. This presentation traces the rapid evolution of HBM and 2.5D packaging technologies, highlighting how they work together to break data traffic jams. Finally, we will address the high-stakes engineering challenges that come with this dense integration, including severe thermal constraints, manufacturing complexities, and the emerging packaging breakthroughs designed to solve them.

Speaker Bio

Jaesik Lee is a Vice President at SK Hynix America, leading development and pathfinding teams for future HBM and 2.5D/3D package technologies. Prior to joining SK Hynix, he has been with Meta, Google, Nvidia, Qualcomm, working on 2.5D packaging technologies developments and manufacturing for high performance computing (HPC) and AR devices. Jaesik received his Ph.D degree in mechanical engineering at University of Waterloo, Canada.