Publications
Heterogeneously integrated quantum chip interposer packaging
Abstract
Quantum computers provide faster solutions to specific compute-intensive classical problems. However, building a fault-tolerant quantum computer architecture is challenging and demands integrating several qubits with optimized signal routing while maintaining its quantum coherence. Experimental realization of such quantum computers with diverse functional components in a planar monolithic device architecture is challenging due to material and thermodynamic mismatch between various elements. Furthermore, it requires complex control and routing, resulting in parasitic modes and reduced qubit coherence. Thus, a scalable interposer architecture is essential to merge and interconnect different functionalities within a sophisticated chip while maintaining qubit coherence. As such, heterogeneous integration is an optimum solution to scale the qubit technology. We propose a heterogeneously integrated …
- Date
- May 31, 2022
- Authors
- Ramesh Kudalippalliyalil, Sujith Chandran, Akhilesh Jaiswal, Kang L Wang, Ajey P Jacob
- Conference
- 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)
- Pages
- 1869-1874
- Publisher
- IEEE