Abstract

The disclosure provides a circuit structure and method for memory storage using a memory cell and magnetic random access memory (MRAM) stack. A circuit structure includes a memory cell having a first latch configured to store a digital bit, a first diode coupled to the first latch, and a first magnetic random access memory (MRAM) stack coupled to the first latch of the memory cell through the first diode. The first MRAM stack includes a first layer and a second layer each having a respective magnetic moment. The magnetic moment of the second layer is adjustable between a parallel orientation and an antiparallel orientation with respect to the magnetic moment of the first layer. Further, the magnetic anisotropy of the second layer can be modified through application of an applied voltage (VCMA effect). A spin Hall electrode is directly coupled to the first MRAM stack.

Date

2021

Authors

AR Jaiswal, AP Jacob, SR Soss

Inventors

Akhilesh R Jaiswal, Ajey Poovannummoottil Jacob, Steven R Soss

Patent_office

US

Patent_number

11145348

Application_number

16871129