Abstract

Provided by IMEC, APA citation:" World's first vertically stacked gate-all-around Si nanowire CMOS transistors”(Dec. 23, 2016) retrieved Jun. 14, 2017 from https://phys. org/news/2016-12-world vertically-stacked-gateall-around-si. html, pp. 1-2.(Continued)(73) Assignee: GLOBALFOUNDRIES INC., Grand Cayman (KY)

Date

2019

Authors

BJ Pawlak, G Bouche, AP Jacob

Inventors

Bartlomiej J Pawlak, Guillaume Bouche, Ajey P Jacob

Patent_office

US

Patent_number

10453750

Application_number

15629884