Abstract

One illustrative method disclosed herein includes, among other things, recessing first and second fins to define replace ment fin cavities in a layer of insulating material, forming an initial strain relaxed buffer layer such that it only partially fills the replacement fin cavities, implanting carbon into the initial strain relaxed buffer layer in the NMOS region, forming a channel semiconductor material on the initial strain relaxed buffer layer within the replacement fin cavities in both the NMOS region and the PMOS region to thereby define an NMOS fin comprised of the channel semiconduc tor material and a carbon-doped strain relaxed buffer layer and a PMOS fin comprised of the channel semiconductor material and the initial strain relaxed buffer layer and forming gate structures for the NMOS and PMOS devices. 9 Claims, 13 Drawing Sheets

Date

2017

Authors

AP Jacob

Inventors

Ajey Poovannummoottil Jacob

Patent_office

US

Patent_number

9741622

Application_number

14608902