Publications

Fin isolation structures facilitating different fin isolation schemes

Abstract

Methods and semiconductor structures formed from the methods are provided which facilitate fabricating semicon ductor fin structures. The methods include, for example: providing a wafer with at least one semiconductor fin extending above a substrate; transforming a portion of the semiconductor fin (s) into an isolation layer, the isolation layer separating a semiconductor layer of the semiconductor finCS) from the Substrate; and proceeding with forming a fin device (s) of a first architectural type in a first fin region of the semiconductor fin?(s), and a fin device (s) of a second architectural type in a second fin region of the semiconduc tor finCs), where the first architectural type and the second architectural type are different fin device architectures.

Date
June 6, 2017
Authors
AP Jacob, K Cheng, B Doris, N Loubet, P Khare, R Divakaruni
Inventors
Ajey Poovannummoottil Jacob, Kangguo Cheng, Bruce Doris, Nicolas Loubet, Prasanna Khare, Rama Divakaruni
Patent_office
US
Patent_number
9673222
Application_number
15156506