Publications

FinFET device including a dielectrically isolated silicon alloy fin

Abstract

(57) ABSTRACT A method includes forming a fin on a semiconductor Sub strate. An isolation structure is formed adjacent the fin. A silicon alloy material is formed on a portion of the fin extending above the isolation structure. A thermal process is performed to define a silicon alloy fin portion from the silicon alloy material and the fin and to define a first insulating layer separating the fin from the Substrate.

Date
April 25, 2017
Authors
AP Jacob
Inventors
Ajey Poovannummoottil Jacob
Patent_office
US
Patent_number
9634123
Application_number
14676909