Abstract

One illustrative method disclosed herein includes forming a recessed fin structure and a replacement fin cavity in a layer of insulating material above the recessed fin structure, forming at least first and second individual layers of episemiconduc tor material in the replacement fin cavity, wherein each of the first and second layers have different concentrations of ger manium, performing an anneal process on the first and second layers so as to form a Substantially homogeneous SiGe replacement fin in the fin cavity, and forming a gate structure around at least a portion of the replacement fin. 25 Claims, 5 Drawing Sheets

Date

2016

Authors

AP Jacob, MK Akarvardar

Inventors

Ajey Poovannummoottil Jacob, Murat Kerem Akarvardar

Patent_office

US

Patent_number

9425289

Application_number

14471038