Abstract

One device disclosed includes a gate structure positioned around a perimeter Surface of the fin, a layer of channel semiconductor material having an axial length in the channel length direction of the device that corresponds approximately to the overall width of the gate structure being positioned between the gate structure and around the outer perimeter surface of the fin, wherein an inner surface of the layer of channel semiconductor material is spaced apart from and does not contact the outer perimeter surface of the fin. One method disclosed involves, among other things, forming first and second layers of semiconductor material around the fin, forming a gate structure around the second semiconductor material, removing the portions of the first and second layers of semiconductor material positioned laterally outside of sidewall spacers and removing the first layer of semiconduc tor material positioned below the …

Date

2016

Authors

AP Jacob, R Xie, M Hargrove

Inventors

Ajey Poovannummoottil Jacob, Ruilong Xie, Michael Hargrove

Patent_office

US

Patent_number

9373721

Application_number

14175113