Abstract

One illustrative method disclosed herein includes, among other things, forming a fin in a semiconductor Substrate and performing an epitaxial deposition process using a combina tion of silane (SiH), dichlorosilane (SiH, Cl), germane (GeH) and a carrier gas to form an episemiconductor mate rial around the fin, wherein the flow rate of dichlorosilane used during the epitaxial deposition process is equal to
10-90% of the combined flow rate of silane and dichlorosi lane.

Date

2015

Authors

Y Qi, AP Jacob, JA Fronheiser, MK Akarvardar, DP Brunco

Inventors

Yi Qi, Ajey Poovannummoottil Jacob, Jody A Fronheiser, Murat Kerem Akarvardar, David Paul Brunco

Patent_office

US

Application_number

14267634