Abstract

Semiconductor fabrication methods are provided which include facilitating fabricating semiconductor fin structures by: providing a wafer with at least one fin extending above a Substrate, the at least one fin including a first layer disposed above a second layer; mechanically stabilizing the first layer; removing at least a portion of the second layer of the finCs) to create a void below the first layer; filling the void, at least partially, below the first layer with an isolation material to create an isolation layer within the fin (S); and proceeding with forming a fin device (s) of a first architectural type in a first fin region of the finCs), and a fin device (s) of a second architec tural type in a second fin region of the fin?(s), where the first architectural type and the second architectural type are dif ferent fin device architectures.

Date

July 28, 2015

Authors

AP Jacob, K Cheng, BB Doris, N Loubet, P Khare, R Divakaruni

Inventors

Ajey P Jacob, Kangguo Cheng, Bruce B Doris, Nicolas Loubet, Prasanna Khare, Ramachandra Divakaruni

Patent_office

US

Patent_number

9093496

Application_number

13945445