Abstract

Traditional approaches to evaluating a system's vulnerability to Single Event Upsets (SEUs) require elaborate and costly radiation beam testing or time-consuming simulation. While beam testing represents definitive evidence of a processor's susceptibility to radiation-induced upsets, we believe that low-cost in-house bit error injection tests provide a valuable tool both in their own right and as an intermediate step towards approximating a processor or application's behavior in the presence of cosmic radiation, prior to beam testing. In this paper we describe a new hardware/software tool named the Memory Sentinel and Injection System (MSIS) that initially targets the two PowerPC 405s within the Xilinx Virtex-4 FX family of FPGAs. The MSIS leverages the configurable logic of an FPGA as well as a custom software interrupt to inject bit errors into the full set of a processor's registers and caches in a user-transparent …

Date

May 1, 2011

Authors

Mark Bucciero, John Paul Walters, Roger Moussalli, Shanyuan Gao, Matthew French

Conference

2011 IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines

Pages

154-161

Publisher

IEEE