Publications

Merging Programming Models and On-chip Networks to Meet the Programmable and Performance Needs of Multi-core Systems on a Programmable Chip

Abstract

The Reconfigurable Data-Stream Hardware Software Architecture (Redsharc) is a programming model and network-on-a-chip solution designed to scale to meet the performance needs of multi-core systems on a programmable chip. Redsharc uses an abstract API that allows programmers to develop systems of simultaneously executing kernels, in software or hardware, that communicate over a seamless interface. To support high performance systems with numerous hardware kernels, Redsharc incorporates two on-chip networks that directly mimic the API. Our results show that Redsharc running at 200 MHz, 32-bit data widths can achieve 800 MBps per stream from hardware to hardware, 480 MBps for a software to hardware stream, and between 20 MBps and 400 MBps for random access data in blocks, regardless of the number of kernels in the system.

Date
2010
Authors
Andrew G Schmidt, William V Kritikos, Erik K Anderson, Ron Sass, Matthew French
Conference
2010 International Conference on Reconfigurable Computing and FPGAs
Pages
334-339
Publisher
IEEE