Abstract

The Reconfigurable Hardware in Orbit (RHinO) project is focused on creating a set of design tools that facilitate and automate design techniques for reconfigurable computing in space, using SRAM-based field-programmable-gate-array (FPGA) technology. In the final year of the project, design tools that have been created to visualize and analyze an FPGA circuit for radiation weaknesses and power inefficiencies were validated and verified in radiation testing and power measurement testbeds. For radiation, a single event Upset (SEU) emulator, persistence analysis and mitigation tool, and a half-latch removal tool for Xilinx Virtex-II devices have been created. For power, dynamic power visualization, analysis, and optimization tools have been completed. In this paper, the final combined test results are presented for an image convolution test circuit with different levels of radiation mitigation and power optimization.

Date

2006

Authors

Matthew French, Paul Graham, Michael Wirthlin, Li Wang

Journal

NASA Earth Science Technology Conference