Publications
Low Latency Recoding CORDIC Algorithm for FPGA Implementation
Abstract
The Coordinate Rotation Digital Computer (CORDIC) algorithm is widely recognized for its fast real-time processing capabilities, making it highly suitable for hardware implementations in diverse applications such as signal processing, high-performance computing, and edge computing devices. Despite its advantages, the traditional CORDIC algorithm’s iterative computational method introduces significant challenges, including a complex structure and high hardware resource consumption, which can limit its efficiency and scalability in certain applications.
In this article, we introduce an innovative and efficient variation of the CORDIC algorithm designed to address these challenges. Our proposed algorithm significantly reduces the number of required operations while maintaining computational accuracy, thereby optimizing performance. Furthermore, we demonstrate that this streamlined algorithm can be effectively …
- Date
- July 5, 2025
- Authors
- Pawel Poczekajlo, Leonid Moroz, Ewa Deelman, Michela Taufer, Pawel Gepner, Jerzy Krawiec
- Book
- International Conference on Computational Science
- Pages
- 75-89
- Publisher
- Springer Nature Switzerland