Abstract

HOIL 2/336(2006.01) A method includes forming a fin on a semiconductor Sub HOIL 2L/3205(2006.01) strate and forming recesses on sidewalls of the fin. A silicon HOIL 29/78(2006.01) alloy material is formed in the recesses. A thermal process HOIL 29/66(2006.01) is performed to define a silicon alloy fin portion from the HOIL 2L/324(2006.01) silicon alloy material and the fin. A semiconductor device HOIL 2L/18(2006.01) includes a Substrate, a fin defined on the Substrate and an HOIL 29/16.5(2006.01) isolation structure disposed adjacent the fin. A first portion HOIL 21/02(2006.01) of the fin extending above the isolation structure has a (52) US Cl. substantially vertical sidewall and a different material com CPC HOIL 29/7851 (2013.01); HOIL 21/02164 position than a second portion of the fin not extending above (2013.01). tion its (2013. o. noti, the isolation structure.

Date

2016

Authors

AP Jacob, JA FRONHEISER, Y Qi, S Mignot

Inventors

Ajey Poovannummoottil Jacob, Jody A FRONHEISER, Yi Qi, Sylvie Mignot

Patent_office

US

Patent_number

9478663

Application_number

14526617