Abstract

The rising processor density and the advent of multi-core architectures have increased the amount of on-chip processing resources at a rate commensurate with Moore’s Law. As the number of resources on-chip increases, it becomes more likely that multiple applications will have to share those resources, applications whose resource requirements are independent of each other and vary in response to their own environmental stimuli [1]. Maintaining high levels of performance on these applications will require efficient, run-time arbitration of on-chip resources. Such arbitration will require the ability to allocate and de-allocate dynamically resources such as cores and network links, and will defy the static mappings and stove-piped parallelism of previous architectures. This abstract motivates the need for intelligent run-time resource management techniques for large multi-core architectures. The need for these techniques arises from two key factors: resource fragmentation and application mapping. Resource fragmentation occurs when an application is mapped to an irregular and spatially discontinuous region of cores. Application mapping refers to the assignment of tasks to cores in the processor such that high performance is achieved by minimizing communication latencies between tasks in the application. To motivate the need for intelligent run-time systems, we present a model of an actual application and specify how its resource requirement might vary over time. We show how resource fragmentation can occur under those specified variations in resource requirements. Using a high-level simulator developed at USC/ISI, we then show how …

Date

January 1, 1970

Authors

Dong-In Kang, Jinwoo Suh, Janice O McMahon, Stephen P Crago

Journal

Proceedings of the 2007 Workshop on High Performance Embedded Computing (HPEC07)