Abstract

The System Level Applications of Adaptive Computing (SLAAC) project is defining an open, distributed, scalable, adaptive computing systems architecture based on a highspeed network cluster of heterogeneous, FPGA‐accelerated nodes. Two reference implementations of this architecture are being created. The Research Reference Platform (RRP) is a MyrinetTM cluster of PCs with PCI‐based FPGA accelerators (SLAAC‐1). The Deployable Reference Platform (DRP) is a Myrinet cluster of PowerPCTM nodes with VME‐based FPGA accelerators (SLAAC‐2) and a commercial 6U‐VME quad‐ PowerPC board (CSPI M2641S) serving as the carrier. A key strategy proposed for successful ACS technology insertions is source‐code compatibility between the RRP and DRP platforms. This paper focuses on the development of the SLAAC‐1 and SLAAC‐2 accelerators and how the network‐centric SLAAC system‐level …

Date

October 9, 2025

Authors

Brian Schott, Stephen P Crago, Robert H Parker, Chen H Chen, Lauretta C Carter, Joseph P Czarnaski, Matthew French, Ivan Hom, Tam Tho, Terri Valenti

Journal

VLSI Design

Volume

10

Issue

3

Pages

265-279

Publisher

Hindawi Publishing Corporation